From c71ed05f8f189984e15c7885e9ca1f0b3b6f33cc Mon Sep 17 00:00:00 2001 From: "Morgan 'ARR\\!' Allen" Date: Fri, 29 Dec 2023 21:29:05 -0800 Subject: [PATCH] update GPIO const names --- main/esp32-lora.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/main/esp32-lora.c b/main/esp32-lora.c index 70a75a5..8d08d8b 100644 --- a/main/esp32-lora.c +++ b/main/esp32-lora.c @@ -11,7 +11,7 @@ #include "driver/gpio.h" #include "driver/spi_common.h" #include "driver/spi_master.h" -#include "driver/spi_common_internal.h" +#include "spi_common_internal.h" #include "esp32-lora.h" @@ -270,7 +270,7 @@ void lora32_set_spreadfactor(lora32_cfg_t *lora, uint8_t factor) { lora32_write_reg(lora, REG_DETECTION_THRESHOLD, DETECT_THRES_OTHER); } - ESP_LOGV(TAG, "lora32_set_spreadfactor: %d", factor); + ESP_LOGD(TAG, "lora32_set_spreadfactor: %d", factor); lora32_write_reg(lora, REG_MODEM_CONFIG_2, (lora32_read_reg(lora, REG_MODEM_CONFIG_2) & 0x0F) | ((factor << 4) & 0xF0)); @@ -514,7 +514,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) { } gpio_config_t io_conf; - io_conf.intr_type = GPIO_PIN_INTR_DISABLE; + io_conf.intr_type = GPIO_INTR_DISABLE; io_conf.mode = GPIO_MODE_OUTPUT; io_conf.pin_bit_mask = (1ULL<reset)|(1ULL<nss); @@ -600,7 +600,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) { if(lora->dio2 > -1) pin_bit_mask |= (1 << lora->dio2); - io_conf.intr_type = GPIO_PIN_INTR_POSEDGE; + io_conf.intr_type = GPIO_INTR_POSEDGE; io_conf.pin_bit_mask = pin_bit_mask; io_conf.mode = GPIO_MODE_INPUT; io_conf.pull_down_en = 1;