diff --git a/main/esp32-lora.c b/main/esp32-lora.c
index 6ae60e3..49258e4 100644
--- a/main/esp32-lora.c
+++ b/main/esp32-lora.c
@@ -172,9 +172,9 @@ void lora32_set_frequency(lora32_cfg_t *lora, long frequency) {
   lora32_write_reg(lora, REG_FRF_MID, (uint8_t)(frf >>  8) & 0xFF);
   lora32_write_reg(lora, REG_FRF_LSB, (uint8_t)(frf >>  0) & 0xFF);
 
-  ESP_LOGD(TAG, "REG_FRF_MSB: 0x%2X", lora32_read_reg(spi, REG_FRF_MSB));
-  ESP_LOGD(TAG, "REG_FRF_MID: 0x%2X", lora32_read_reg(spi, REG_FRF_MID));
-  ESP_LOGD(TAG, "REG_FRF_LSB: 0x%2X", lora32_read_reg(spi, REG_FRF_LSB));
+  ESP_LOGD(TAG, "REG_FRF_MSB: 0x%2X", lora32_read_reg(lora->spi, REG_FRF_MSB));
+  ESP_LOGD(TAG, "REG_FRF_MID: 0x%2X", lora32_read_reg(lora->spi, REG_FRF_MID));
+  ESP_LOGD(TAG, "REG_FRF_LSB: 0x%2X", lora32_read_reg(lora->spi, REG_FRF_LSB));
 }
 
 void lora32_set_tx_power(lora32_cfg_t *lora, uint8_t level, uint8_t output) {
@@ -191,7 +191,7 @@ void lora32_set_tx_power(lora32_cfg_t *lora, uint8_t level, uint8_t output) {
     lora32_write_reg(lora, REG_PA_CONFIG, PA_BOOST | (level - 2));
   }
 
-  ESP_LOGD(TAG, "REG_PA_CONFIG: 0x%2X", lora32_read_reg(spi, REG_PA_CONFIG));
+  ESP_LOGD(TAG, "REG_PA_CONFIG: 0x%2X", lora32_read_reg(lora->spi, REG_PA_CONFIG));
 }
 
 uint8_t lora32_parse_packet(lora32_cfg_t *lora, uint8_t size) {