explicity set DIO0 mapping, will need to be changed when DIO1+ are implemented
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2 changed files with 5 additions and 5 deletions
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@ -64,8 +64,8 @@
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#define DEFAULT_PREAMBLE 8
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#define DEFAULT_CR 5
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#define DIO0_MODE_RXDONE 0xC0
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#define DIO0_MODE_TXDONE 0xBF
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#define DIO0_MODE_RXDONE 0x00
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#define DIO0_MODE_TXDONE 0x40
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#define EV_DIO0 (1 << 0)
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@ -143,6 +143,8 @@ void lora32_send(lora32_cfg_t *lora, uint8_t *data, uint8_t len) {
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lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_TX);
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lora32_write_reg(lora, REG_DIO_MAPPING_1, DIO0_MODE_TXDONE);
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ESP_LOGD(TAG, "lora32_send waiting for TX to finish");
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// can be made async by waiting for DIO0 and checking for IRQ_TX_DONE_MASK
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@ -244,9 +246,7 @@ void lora32_enable_continuous_rx(lora32_cfg_t *lora) {
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ESP_LOGD(TAG, "enabling continuous receive");
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if(lora->receive != NULL) {
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uint8_t reg_mapping_1 = lora32_read_reg(lora, REG_DIO_MAPPING_1);
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lora32_write_reg(lora, REG_DIO_MAPPING_1, (reg_mapping_1 ^ DIO0_MODE_RXDONE));
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lora32_write_reg(lora, REG_DIO_MAPPING_1, DIO0_MODE_RXDONE);
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}
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lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_RX_CONTINUOUS);
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