large changeset
change EventQueue to EventGroup decoupled reading FIFO from receive handler added explicit function to read incoming data change create/init functionality, might have been causing heap issues improved dump_regs removed poll_rx
This commit is contained in:
Morgan 'ARR\!' Allen
parent
7e8fa65339
commit
80d3b56313
3 changed files with 75 additions and 84 deletions
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@ -3,6 +3,7 @@
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#include "driver/spi_common.h"
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#include "driver/spi_master.h"
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#include "freertos/event_groups.h"
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#define REG_FIFO 0x00
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#define REG_OP_MODE 0x01
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@ -63,18 +64,24 @@
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#define DEFAULT_PREAMBLE 8
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#define DEFAULT_CR 5
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#define EV_DIO0 (1 << 0)
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enum freq {
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F433, F866, F915
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} lora32_freq;
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const long long frequencies[3];
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const long bandwidths[9];
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enum bandwidth {
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B78, B104, B156, B208, B3125, B417, B625, B125, B250
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};
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typedef void (*receiveCallback)(uint8_t *data, uint8_t size);
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const long long frequencies[3];
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const long bandwidths[9];
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typedef void (*receiveCallback)(uint8_t size);
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typedef struct {
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EventGroupHandle_t events;
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} lora32_handle_t;
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typedef struct lora32_cfg_t {
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uint8_t nss;
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@ -91,10 +98,11 @@ typedef struct lora32_cfg_t {
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bool useCRC;
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bool implicitHeader;
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bool poll_rx;
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receiveCallback receive;
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spi_device_handle_t spi;
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lora32_handle_t handle;
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} lora32_cfg_t;
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lora32_cfg_t lora32_create();
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@ -106,5 +114,6 @@ void lora32_set_spreadfactor(lora32_cfg_t *lora, uint8_t factor);
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void lora32_dump_regs(lora32_cfg_t *lora);
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void lora32_enable_continous_rx(lora32_cfg_t *lora);
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void lora32_set_coding_rate(lora32_cfg_t *lora, uint8_t d);
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void lora32_read_data(lora32_cfg_t *lora, uint8_t *data);
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#endif // _LORA32_H__
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@ -22,8 +22,6 @@
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#define PA_OUTPUT_RFO_PIN 0
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#define PA_OUTPUT_PA_BOOST_PIN 1
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static xQueueHandle dio0_evt_queue = NULL;
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const long long frequencies[] = { 433e+6, 866e+6, 915e+6 };
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const long bandwidths[] = { 7.8e+3, 10.4e+3, 15.6e+3, 20.8e+3, 31.25e+3, 41.7e+3, 62.5e+3, 125e+3, 250e+3 };
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@ -33,14 +31,13 @@ lora32_cfg_t lora32_create() {
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static spi_device_handle_t spi;
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return (lora32_cfg_t){
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.bandwidth = bandwidths[F866],
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.bandwidth = bandwidths[B125],
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.codingRate = DEFAULT_CR,
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.dio0 = CONFIG_LORA32_DIO0_PIN,
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.implicitHeader = false,
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.nss = CONFIG_LORA32_NSS_PIN,
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.reset = CONFIG_LORA32_RESET_PIN,
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.frequency = 866000000,
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.poll_rx = false,
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.preamble = DEFAULT_PREAMBLE,
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.spreadingFactor = DEFAULT_SF,
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.spi = spi,
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@ -237,33 +234,23 @@ uint8_t lora32_data_available(lora32_cfg_t *lora) {
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return lora32_read_reg(lora, REG_RX_NB_BYTES) - lora->fifoIdx;
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}
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void lora32_poll_rx(void *vp) {
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lora32_cfg_t *lora = (lora32_cfg_t*)vp;
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uint8_t msg[MAX_PKT_LENGTH];
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while(true) {
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lora32_parse_packet(lora, 0);
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if(lora32_data_available(lora)) {
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memset(msg, 0, MAX_PKT_LENGTH);
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while(lora32_data_available(lora)) {
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msg[lora->fifoIdx] = lora32_read_reg(lora, REG_FIFO);
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lora->fifoIdx++;
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}
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lora->receive((uint8_t*)&msg, lora->fifoIdx);
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}
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vTaskDelay(100 / portTICK_PERIOD_MS);
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}
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}
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void lora32_dump_regs(lora32_cfg_t *lora) {
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char endline[17] = {0};
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for(uint8_t i = 0; i < 127; i++) {
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printf("0x%2X: 0x%2X\n", i, lora32_read_reg(lora, i));
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if(i % 16 == 0)
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printf("0x%02X: ", i);
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char c = lora32_read_reg(lora, i);
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endline[i % 16] = (c >= 32 ? c : '.');
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printf("%02X%s", c, i % 2 == 1 ? " " : "");
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if(i % 16 == 15)
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printf(" %s\n", endline);
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}
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printf("\n");
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}
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void lora32_toggle_reset(lora32_cfg_t *config) {
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@ -310,68 +297,69 @@ void lora32_set_coding_rate(lora32_cfg_t *lora, uint8_t d) {
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lora32_write_reg(lora, REG_MODEM_CONFIG_1, (lora32_read_reg(lora, REG_MODEM_CONFIG_1) & 0xF1) | (cr << 1));
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}
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void lora32_handle_dio0(void *arg) {
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static void IRAM_ATTR lora32_receive_task(void *arg) {
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lora32_cfg_t *lora = (lora32_cfg_t*)arg;
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static uint8_t msg[MAX_PKT_LENGTH];
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ESP_LOGD(TAG, "starting DIO0 handler task");
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while(1) {
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if(xQueueReceive(dio0_evt_queue, lora, portMAX_DELAY)) {
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ESP_LOGI(TAG, "handling DIO0");
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EventBits_t evbits = xEventGroupWaitBits(lora->handle.events, EV_DIO0, pdTRUE, pdFALSE, 5000 / portTICK_PERIOD_MS);
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memset(msg, 0, MAX_PKT_LENGTH);
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// timed out, loop and continue to wait
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if(evbits == 0) continue;
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// read IRQ flags
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uint8_t irqs = lora32_read_reg(lora, REG_IRQ_FLAGS);
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// clear IRQ flags
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lora32_write_reg(lora, REG_IRQ_FLAGS, irqs);
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ESP_LOGD(TAG, "handling DIO0");
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// TODO: read packet length
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uint8_t len = lora32_read_reg(lora, lora->implicitHeader ? REG_PAYLOAD_LENGTH : REG_RX_NB_BYTES);
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ESP_LOGD(TAG, "lora32_handle_dio0 packet length: %d", len);
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// read IRQ flags
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ESP_LOGD(TAG, "reading irqs");
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uint8_t irqs = lora32_read_reg(lora, REG_IRQ_FLAGS);
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// clear IRQ flags
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ESP_LOGD(TAG, "clearing irqs");
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lora32_write_reg(lora, REG_IRQ_FLAGS, irqs);
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// TODO: set FIFO address to RX address
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uint8_t fifo_addr = lora32_read_reg(lora, REG_FIFO_RX_CURRENT_ADDR);
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ESP_LOGD(TAG, "lora32_handle_dio0 current FIFO address: %d", fifo_addr);
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uint8_t len = lora32_read_reg(lora, (lora->implicitHeader ? REG_PAYLOAD_LENGTH : REG_RX_NB_BYTES));
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ESP_LOGD(TAG, "lora32_receive_task packet length: %d", len);
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lora32_write_reg(lora, REG_FIFO_ADDR_PTR, fifo_addr);
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// TODO: set FIFO address to RX address
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uint8_t fifo_addr = lora32_read_reg(lora, REG_FIFO_RX_CURRENT_ADDR);
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ESP_LOGD(TAG, "lora32_receive_task current FIFO address: %d", fifo_addr);
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uint8_t i = 0;
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for(; i < len; i++) {
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msg[lora->fifoIdx] = lora32_read_reg(lora, REG_FIFO);
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lora32_write_reg(lora, REG_FIFO_ADDR_PTR, fifo_addr);
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lora->fifoIdx++;
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}
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ESP_LOGD(TAG, "lora32_handle_dio0: %s", msg);
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lora->fifoIdx = 0;
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//lora32_write_reg(lora, REG_FIFO_ADDR_PTR, 0);
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lora->receive((uint8_t*)&msg, len);
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}
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lora->receive(len);
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}
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}
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static void IRAM_ATTR lora32_on_dio0(void *arg) {
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void lora32_read_data(lora32_cfg_t *lora, uint8_t *data) {
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uint8_t i = 0;
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uint8_t len = lora32_read_reg(lora, (lora->implicitHeader ? REG_PAYLOAD_LENGTH : REG_RX_NB_BYTES));
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xQueueSendFromISR(dio0_evt_queue, &i, NULL);
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ESP_LOGI(TAG, "Reading %d bytes", len);
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for(i = 0; i < len; i++) {
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data[i] = lora32_read_reg(lora, REG_FIFO);
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printf("%02X (%c) ", data[i], (data[i] > 32 ? data[i] : ' '));
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}
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printf("\n");
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}
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static void IRAM_ATTR lora32_on_dio0(void *arg) {
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BaseType_t woken = pdFALSE;
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xEventGroupSetBitsFromISR(((lora32_cfg_t*)arg)->handle.events, EV_DIO0, &woken);
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}
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uint8_t lora32_init(lora32_cfg_t *lora) {
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ESP_LOGD(TAG, "lora32_init");
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gpio_config_t io_conf;
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io_conf.intr_type = GPIO_PIN_INTR_DISABLE;
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io_conf.mode = GPIO_MODE_OUTPUT;
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// set pin outputs
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gpio_config_t io_conf;
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io_conf.intr_type = GPIO_PIN_INTR_DISABLE;
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io_conf.mode = GPIO_MODE_OUTPUT;
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io_conf.pin_bit_mask = (1ULL<<lora->reset)|(1ULL<<lora->nss);
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io_conf.pull_down_en = 0;
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io_conf.pull_up_en = 0;
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gpio_config(&io_conf);
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lora32_toggle_reset(lora);
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// set NSS high
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ESP_LOGI(TAG, "Bringing NSS high: %d", lora->nss);
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gpio_set_level(lora->nss, 1);
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@ -401,6 +389,9 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
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ESP_ERROR_CHECK(spi_bus_initialize(HSPI_HOST, &buscfg, 0));
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ESP_ERROR_CHECK(spi_bus_add_device(HSPI_HOST, &devcfg, &lora->spi));
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// initialize event groups
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lora->handle.events = xEventGroupCreate();
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uint8_t version = lora32_read_reg(lora, REG_VERSION);
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ESP_LOGD(TAG, "lora32_get_id() == 0x%2X", version);
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assert(version == 0x12);
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@ -435,8 +426,6 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
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if(lora->receive != NULL) {
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ESP_LOGI(TAG, "Setting callback handler");
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dio0_evt_queue = xQueueCreate(10, sizeof(uint8_t));
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io_conf.intr_type = GPIO_PIN_INTR_POSEDGE;
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io_conf.pin_bit_mask = (1ULL << CONFIG_LORA32_DIO0_PIN);
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io_conf.mode = GPIO_MODE_INPUT;
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@ -450,20 +439,13 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
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gpio_isr_handler_add(CONFIG_LORA32_DIO0_PIN, lora32_on_dio0, (void*)lora);
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// this should probably be high priority
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xTaskCreate(&lora32_handle_dio0, "lora32_handle_dio0", 2048, lora, 6, NULL);
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xTaskCreate(&lora32_receive_task, "lora32_receive_task", 14048, (void*)lora, 6, NULL);
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// TODO comment and probably change 0x00 to a macro
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lora32_write_reg(lora, REG_DIO_MAPPING_1, 0x00);
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lora32_enable_continous_rx(lora);
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}
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if(lora->poll_rx) {
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ESP_LOGI(TAG, "enabling rx polling");
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xTaskCreate(&lora32_poll_rx, "lora32_poll_rx", 2048, lora, 6, NULL);
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}
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//lora32_dump_regs(spi);
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return 1;
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};
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@ -62,7 +62,7 @@ static void uart_event_task(void *pvParameters) {
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size += event.size;
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if(dtmp[size - 1] == '\n') {
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if(dtmp[size - 1] == '\n' || dtmp[size - 1] == '\r') {
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uart_write_bytes(UART_NUM_0, (const char*) dtmp, size);
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struct Cmd *handler;
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@ -99,7 +99,7 @@ static void uart_event_task(void *pvParameters) {
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static void handle_lora_receive(uint8_t *data, uint8_t size) {
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uint8_t j;
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ESP_LOGI(TAG, "received: " LOG_RESET_COLOR "%s", data);
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ESP_LOGI(TAG, "received: " LOG_RESET_COLOR "%s", data+13);
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for(uint8_t i = 0; i < size; i += 16) {
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for(j = 0; j < 16; j++) {
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@ -168,7 +168,7 @@ void app_main() {
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xTaskCreate(&loop, "loop", 2048, NULL, 6, NULL);
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lora = lora32_create();
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lora.frequency = frequencies[F915];
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//lora.frequency = frequencies[F915];
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lora.receive = &handle_lora_receive;
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//lora.poll_rx = true;
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