large changeset

change EventQueue to EventGroup
decoupled reading FIFO from receive handler
added explicit function to read incoming data
change create/init functionality, might have been causing heap issues
improved dump_regs
removed poll_rx

include/esp32-lora.h

@@ -3,6 +3,7 @@
 
 #include "driver/spi_common.h"
 #include "driver/spi_master.h"
+#include "freertos/event_groups.h"
 
 #define REG_FIFO                 0x00
 #define REG_OP_MODE              0x01
@@ -63,18 +64,24 @@
 #define DEFAULT_PREAMBLE 8
 #define DEFAULT_CR 5
 
+#define EV_DIO0 (1 << 0)
+
 enum freq {
   F433, F866, F915
 } lora32_freq;
 
-const long long frequencies[3];
-const long bandwidths[9];
-
 enum bandwidth {
   B78, B104, B156, B208, B3125, B417, B625, B125, B250
 };
 
-typedef void (*receiveCallback)(uint8_t *data, uint8_t size);
+const long long frequencies[3];
+const long bandwidths[9];
+
+typedef void (*receiveCallback)(uint8_t size);
+
+typedef struct {
+  EventGroupHandle_t events;
+} lora32_handle_t;
 
 typedef struct lora32_cfg_t {
   uint8_t nss;
@@ -91,10 +98,11 @@ typedef struct lora32_cfg_t {
 
   bool useCRC;
   bool implicitHeader;
-  bool poll_rx;
 
   receiveCallback receive;
   spi_device_handle_t spi;
+
+  lora32_handle_t handle;
 } lora32_cfg_t;
 
 lora32_cfg_t lora32_create();
@@ -106,5 +114,6 @@ void lora32_set_spreadfactor(lora32_cfg_t *lora, uint8_t factor);
 void lora32_dump_regs(lora32_cfg_t *lora);
 void lora32_enable_continous_rx(lora32_cfg_t *lora);
 void lora32_set_coding_rate(lora32_cfg_t *lora, uint8_t d);
+void lora32_read_data(lora32_cfg_t *lora, uint8_t *data);
 
 #endif // _LORA32_H__

main/esp32-lora.c

@@ -22,8 +22,6 @@
 #define PA_OUTPUT_RFO_PIN      0
 #define PA_OUTPUT_PA_BOOST_PIN 1
 
-static xQueueHandle dio0_evt_queue = NULL;
-
 const long long frequencies[] = { 433e+6, 866e+6, 915e+6 };
 const long bandwidths[] = { 7.8e+3, 10.4e+3, 15.6e+3, 20.8e+3, 31.25e+3, 41.7e+3, 62.5e+3, 125e+3, 250e+3 };
 
@@ -33,14 +31,13 @@ lora32_cfg_t lora32_create() {
   static spi_device_handle_t spi;
 
   return (lora32_cfg_t){
-    .bandwidth = bandwidths[F866],
+    .bandwidth = bandwidths[B125],
     .codingRate = DEFAULT_CR,
     .dio0 = CONFIG_LORA32_DIO0_PIN,
     .implicitHeader = false,
     .nss = CONFIG_LORA32_NSS_PIN,
     .reset = CONFIG_LORA32_RESET_PIN,
     .frequency = 866000000,
-    .poll_rx = false,
     .preamble = DEFAULT_PREAMBLE,
     .spreadingFactor = DEFAULT_SF,
     .spi = spi,
@@ -237,33 +234,23 @@ uint8_t lora32_data_available(lora32_cfg_t *lora) {
   return lora32_read_reg(lora, REG_RX_NB_BYTES) - lora->fifoIdx;
 }
 
-void lora32_poll_rx(void *vp) {
-  lora32_cfg_t *lora = (lora32_cfg_t*)vp;
-  uint8_t msg[MAX_PKT_LENGTH];
-
-  while(true) {
-    lora32_parse_packet(lora, 0);
-
-    if(lora32_data_available(lora)) {
-      memset(msg, 0, MAX_PKT_LENGTH);
-
-      while(lora32_data_available(lora)) {
-        msg[lora->fifoIdx] = lora32_read_reg(lora, REG_FIFO);
-
-        lora->fifoIdx++;
-      }
-
-      lora->receive((uint8_t*)&msg, lora->fifoIdx);
-    }
-
-    vTaskDelay(100 / portTICK_PERIOD_MS);
-  }
-}
-
 void lora32_dump_regs(lora32_cfg_t *lora) {
+  char endline[17] = {0};
+
   for(uint8_t i = 0; i < 127; i++) {
-    printf("0x%2X: 0x%2X\n", i, lora32_read_reg(lora, i));
+    if(i % 16 == 0)
+      printf("0x%02X: ", i);
+
+    char c = lora32_read_reg(lora, i);
+    endline[i % 16] = (c >= 32 ? c : '.');
+
+    printf("%02X%s", c, i % 2 == 1 ? " " : "");
+
+    if(i % 16 == 15)
+      printf("  %s\n", endline);
   }
+
+  printf("\n");
 }
 
 void lora32_toggle_reset(lora32_cfg_t *config) {
@@ -310,68 +297,69 @@ void lora32_set_coding_rate(lora32_cfg_t *lora, uint8_t d) {
   lora32_write_reg(lora, REG_MODEM_CONFIG_1, (lora32_read_reg(lora, REG_MODEM_CONFIG_1) & 0xF1) | (cr << 1));
 }
 
-void lora32_handle_dio0(void *arg) {
+static void IRAM_ATTR lora32_receive_task(void *arg) {
   lora32_cfg_t *lora = (lora32_cfg_t*)arg;
-  static uint8_t msg[MAX_PKT_LENGTH];
+  ESP_LOGD(TAG, "starting DIO0 handler task");
 
   while(1) {
-		if(xQueueReceive(dio0_evt_queue, lora, portMAX_DELAY)) {
+		EventBits_t evbits = xEventGroupWaitBits(lora->handle.events, EV_DIO0, pdTRUE, pdFALSE, 5000 / portTICK_PERIOD_MS);
-      ESP_LOGI(TAG, "handling DIO0");
 
-      memset(msg, 0, MAX_PKT_LENGTH);
+    // timed out, loop and continue to wait
+    if(evbits == 0) continue;
 
-      // read IRQ flags
+    ESP_LOGD(TAG, "handling DIO0");
-      uint8_t irqs = lora32_read_reg(lora, REG_IRQ_FLAGS);
-      // clear IRQ flags
-      lora32_write_reg(lora, REG_IRQ_FLAGS, irqs);
 
-      // TODO: read packet length
+    // read IRQ flags
-      uint8_t len = lora32_read_reg(lora, lora->implicitHeader ? REG_PAYLOAD_LENGTH : REG_RX_NB_BYTES);
+    ESP_LOGD(TAG, "reading irqs");
-      ESP_LOGD(TAG, "lora32_handle_dio0 packet length: %d", len);
+    uint8_t irqs = lora32_read_reg(lora, REG_IRQ_FLAGS);
+    // clear IRQ flags
+    ESP_LOGD(TAG, "clearing irqs");
+    lora32_write_reg(lora, REG_IRQ_FLAGS, irqs);
 
-      // TODO: set FIFO address to RX address
+    uint8_t len = lora32_read_reg(lora, (lora->implicitHeader ? REG_PAYLOAD_LENGTH : REG_RX_NB_BYTES));
-      uint8_t fifo_addr = lora32_read_reg(lora, REG_FIFO_RX_CURRENT_ADDR);
+    ESP_LOGD(TAG, "lora32_receive_task packet length: %d", len);
-      ESP_LOGD(TAG, "lora32_handle_dio0 current FIFO address: %d", fifo_addr);
 
-      lora32_write_reg(lora, REG_FIFO_ADDR_PTR, fifo_addr);
+    // TODO: set FIFO address to RX address
+    uint8_t fifo_addr = lora32_read_reg(lora, REG_FIFO_RX_CURRENT_ADDR);
+    ESP_LOGD(TAG, "lora32_receive_task current FIFO address: %d", fifo_addr);
 
-      uint8_t i = 0;
+    lora32_write_reg(lora, REG_FIFO_ADDR_PTR, fifo_addr);
-      for(; i < len; i++) {
-        msg[lora->fifoIdx] = lora32_read_reg(lora, REG_FIFO);
 
-        lora->fifoIdx++;
+    lora->receive(len);
-      }
-
-      ESP_LOGD(TAG, "lora32_handle_dio0: %s", msg);
-
-      lora->fifoIdx = 0;
-      //lora32_write_reg(lora, REG_FIFO_ADDR_PTR, 0);
-
-      lora->receive((uint8_t*)&msg, len);
-    }
   }
 }
 
-static void IRAM_ATTR lora32_on_dio0(void *arg) {
+void lora32_read_data(lora32_cfg_t *lora, uint8_t *data) {
   uint8_t i = 0;
+  uint8_t len = lora32_read_reg(lora, (lora->implicitHeader ? REG_PAYLOAD_LENGTH : REG_RX_NB_BYTES));
 
-  xQueueSendFromISR(dio0_evt_queue, &i, NULL);
+  ESP_LOGI(TAG, "Reading %d bytes", len);
+
+  for(i = 0; i < len; i++) {
+    data[i] = lora32_read_reg(lora, REG_FIFO);
+    printf("%02X (%c) ", data[i], (data[i] > 32 ? data[i] : ' '));
+  }
+
+  printf("\n");
+}
+
+static void IRAM_ATTR lora32_on_dio0(void *arg) {
+  BaseType_t woken = pdFALSE;
+
+  xEventGroupSetBitsFromISR(((lora32_cfg_t*)arg)->handle.events, EV_DIO0, &woken);
 }
 
 uint8_t lora32_init(lora32_cfg_t *lora) {
-  ESP_LOGD(TAG, "lora32_init");
+  gpio_config_t io_conf;
+  io_conf.intr_type = GPIO_PIN_INTR_DISABLE;
+  io_conf.mode = GPIO_MODE_OUTPUT;
 
-  // set pin outputs
-	gpio_config_t io_conf;
-	io_conf.intr_type = GPIO_PIN_INTR_DISABLE;
-	io_conf.mode = GPIO_MODE_OUTPUT;
 	io_conf.pin_bit_mask = (1ULL<<lora->reset)|(1ULL<<lora->nss);
 	io_conf.pull_down_en = 0;
 	io_conf.pull_up_en = 0;
 	gpio_config(&io_conf);
 
   lora32_toggle_reset(lora);
-
   // set NSS high
   ESP_LOGI(TAG, "Bringing NSS high: %d", lora->nss);
   gpio_set_level(lora->nss, 1);
@@ -401,6 +389,9 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
   ESP_ERROR_CHECK(spi_bus_initialize(HSPI_HOST, &buscfg, 0));
   ESP_ERROR_CHECK(spi_bus_add_device(HSPI_HOST, &devcfg, &lora->spi));
 
+  // initialize event groups
+  lora->handle.events = xEventGroupCreate();
+
   uint8_t version = lora32_read_reg(lora, REG_VERSION);
   ESP_LOGD(TAG, "lora32_get_id() == 0x%2X", version);
   assert(version == 0x12);
@@ -435,8 +426,6 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
   if(lora->receive != NULL) {
     ESP_LOGI(TAG, "Setting callback handler");
 
-    dio0_evt_queue = xQueueCreate(10, sizeof(uint8_t));
-
     io_conf.intr_type = GPIO_PIN_INTR_POSEDGE;
     io_conf.pin_bit_mask = (1ULL << CONFIG_LORA32_DIO0_PIN);
     io_conf.mode = GPIO_MODE_INPUT;
@@ -450,20 +439,13 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
     gpio_isr_handler_add(CONFIG_LORA32_DIO0_PIN, lora32_on_dio0, (void*)lora);
 
     // this should probably be high priority
-    xTaskCreate(&lora32_handle_dio0, "lora32_handle_dio0", 2048, lora, 6, NULL);
+    xTaskCreate(&lora32_receive_task, "lora32_receive_task", 14048, (void*)lora, 6, NULL);
 
+    // TODO comment and probably change 0x00 to a macro
     lora32_write_reg(lora, REG_DIO_MAPPING_1, 0x00);
 
     lora32_enable_continous_rx(lora);
   }
 
-  if(lora->poll_rx) {
-    ESP_LOGI(TAG, "enabling rx polling");
-
-    xTaskCreate(&lora32_poll_rx, "lora32_poll_rx",  2048, lora, 6, NULL);
-  }
-
-  //lora32_dump_regs(spi);
-
   return 1;
 };

test/lora32/main/main.c

@@ -62,7 +62,7 @@ static void uart_event_task(void *pvParameters) {
 
           size += event.size;
 
-          if(dtmp[size - 1] == '\n') {
+          if(dtmp[size - 1] == '\n' || dtmp[size - 1] == '\r') {
             uart_write_bytes(UART_NUM_0, (const char*) dtmp, size);
 
             struct Cmd *handler;
@@ -99,7 +99,7 @@ static void uart_event_task(void *pvParameters) {
 static void handle_lora_receive(uint8_t *data, uint8_t size) {
   uint8_t j;
 
-  ESP_LOGI(TAG, "received: " LOG_RESET_COLOR "%s", data);
+  ESP_LOGI(TAG, "received: " LOG_RESET_COLOR "%s", data+13);
 
   for(uint8_t i = 0; i < size; i += 16) {
     for(j = 0; j < 16; j++) {
@@ -168,7 +168,7 @@ void app_main() {
   xTaskCreate(&loop, "loop",  2048, NULL, 6, NULL);
 
   lora = lora32_create();
-  lora.frequency = frequencies[F915];
+  //lora.frequency = frequencies[F915];
   lora.receive = &handle_lora_receive;
   //lora.poll_rx = true;