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cleanup of IRQ pin setting

This commit is contained in:
Morgan 'ARR\!' Allen 2023-09-06 16:45:20 -07:00
parent 9d1bd57a2e
commit 97204f089b
1 changed files with 11 additions and 7 deletions
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18
main/esp32-lora.c
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@ -567,17 +567,21 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
// TODO check at least one DIOx pin is not NULL
uint64_t pin_bit_mask = 0;
if(lora->dio0 > -1)
pin_bit_mask |= (1 << lora->dio0);
if(lora->dio1 > -1)
pin_bit_mask |= (1 << lora->dio1);
if(lora->dio2 > -1)
pin_bit_mask |= (1 << lora->dio2);
io_conf.intr_type = GPIO_PIN_INTR_POSEDGE;
io_conf.pin_bit_mask = ((1ULL << lora->dio0) | (1ULL << lora->dio1) | (1ULL << lora->dio2));
io_conf.pin_bit_mask = pin_bit_mask;
io_conf.mode = GPIO_MODE_INPUT;
io_conf.pull_down_en = 0;
io_conf.pull_down_en = 1;
io_conf.pull_up_en = 0;
gpio_config(&io_conf);
gpio_set_intr_type(lora->dio0, GPIO_INTR_POSEDGE);
gpio_set_intr_type(lora->dio1, GPIO_INTR_POSEDGE);
gpio_set_intr_type(lora->dio2, GPIO_INTR_POSEDGE);
// the DIO interrupt handling for every device is done from one task
if(dio_task_handle == NULL) {
ESP_LOGV(TAG, "Setting callback handler and ISR service");
@ -603,5 +607,5 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
gpio_isr_handler_add(lora->dio2, lora32_on_dio, (void*)lora);
}
return 1;
return ESP_OK;
};