move all LOGI to more severe log levels
This commit is contained in:
parent
41065d791e
commit
9d1bd57a2e
1 changed files with 33 additions and 31 deletions
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@ -74,7 +74,7 @@ double lora32_calc_datarate(lora32_cfg_t *lora) {
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double cr = (4.0 / (long)lora->codingRate);
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double cr = (4.0 / (long)lora->codingRate);
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double sf = pow(2, lora->spreadingFactor);
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double sf = pow(2, lora->spreadingFactor);
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double c2 = sf / bandwidths[lora->bandwidth];
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double c2 = sf / bandwidths[lora->bandwidth];
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ESP_LOGI(TAG, "codingRate: %d cr: %f sf: %f c2: %f", lora->codingRate, cr, sf, c2);
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ESP_LOGD(TAG, "codingRate: %d cr: %f sf: %f c2: %f", lora->codingRate, cr, sf, c2);
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return lora->spreadingFactor * cr / c2 * 1000;
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return lora->spreadingFactor * cr / c2 * 1000;
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}
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}
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@ -151,12 +151,12 @@ void lora32_send(lora32_cfg_t *lora, uint8_t *data, uint8_t len) {
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}
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}
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void lora32_set_frequency(lora32_cfg_t *lora, long frequency) {
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void lora32_set_frequency(lora32_cfg_t *lora, long frequency) {
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ESP_LOGI(TAG, "lora32_set_frequency: %lu", frequency);
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ESP_LOGD(TAG, "lora32_set_frequency: %lu", frequency);
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uint64_t frf = ((uint64_t)frequency << 19) / 32000000;
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uint64_t frf = ((uint64_t)frequency << 19) / 32000000;
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ESP_LOGI(TAG, "REG_FRF_MSB: 0x%2X", (uint8_t)(frf >> 16));
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ESP_LOGD(TAG, "REG_FRF_MSB: 0x%2X", (uint8_t)(frf >> 16));
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ESP_LOGI(TAG, "REG_FRF_MID: 0x%2X", (uint8_t)(frf >> 8));
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ESP_LOGD(TAG, "REG_FRF_MID: 0x%2X", (uint8_t)(frf >> 8));
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ESP_LOGI(TAG, "REG_FRF_LSB: 0x%2X", (uint8_t)(frf >> 0));
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ESP_LOGD(TAG, "REG_FRF_LSB: 0x%2X", (uint8_t)(frf >> 0));
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lora32_write_reg(lora, REG_FRF_MSB, (uint8_t)(frf >> 16));
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lora32_write_reg(lora, REG_FRF_MSB, (uint8_t)(frf >> 16));
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lora32_write_reg(lora, REG_FRF_MID, (uint8_t)(frf >> 8));
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lora32_write_reg(lora, REG_FRF_MID, (uint8_t)(frf >> 8));
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@ -194,7 +194,7 @@ void lora32_set_tx_power(lora32_cfg_t *lora, uint8_t level, uint8_t output) {
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lora32_write_reg(lora, REG_PA_CONFIG, PA_BOOST | (level - 2));
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lora32_write_reg(lora, REG_PA_CONFIG, PA_BOOST | (level - 2));
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}
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}
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ESP_LOGI(TAG, "set_tx_power(%d, %d)", level, output);
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ESP_LOGD(TAG, "set_tx_power(%d, %d)", level, output);
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ESP_LOGD(TAG, "REG_PA_CONFIG: 0x%2X", lora32_read_reg(lora, REG_PA_CONFIG));
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ESP_LOGD(TAG, "REG_PA_CONFIG: 0x%2X", lora32_read_reg(lora, REG_PA_CONFIG));
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}
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}
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@ -231,7 +231,7 @@ void lora32_dump_regs(lora32_cfg_t *lora) {
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void lora32_toggle_reset(lora32_cfg_t *config) {
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void lora32_toggle_reset(lora32_cfg_t *config) {
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// toggle reset (L/H)
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// toggle reset (L/H)
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ESP_LOGI(TAG, "Toggling reset pin %d", config->reset);
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ESP_LOGD(TAG, "Toggling reset pin %d", config->reset);
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gpio_set_level(config->reset, 0);
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gpio_set_level(config->reset, 0);
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vTaskDelay(100 / portTICK_PERIOD_MS); // requires 100us
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vTaskDelay(100 / portTICK_PERIOD_MS); // requires 100us
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@ -257,7 +257,7 @@ void lora32_set_spreadfactor(lora32_cfg_t *lora, uint8_t factor) {
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lora32_write_reg(lora, REG_DETECTION_THRESHOLD, DETECT_THRES_OTHER);
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lora32_write_reg(lora, REG_DETECTION_THRESHOLD, DETECT_THRES_OTHER);
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}
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}
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ESP_LOGI(TAG, "lora32_set_spreadfactor: %d", factor);
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ESP_LOGV(TAG, "lora32_set_spreadfactor: %d", factor);
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lora32_write_reg(lora, REG_MODEM_CONFIG_2, (lora32_read_reg(lora, REG_MODEM_CONFIG_2) & 0x0F) | ((factor << 4) & 0xF0));
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lora32_write_reg(lora, REG_MODEM_CONFIG_2, (lora32_read_reg(lora, REG_MODEM_CONFIG_2) & 0x0F) | ((factor << 4) & 0xF0));
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@ -312,11 +312,11 @@ int16_t lora32_get_packet_rssi(lora32_cfg_t *lora) {
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long lora32_get_bandwidth(lora32_cfg_t *lora) {
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long lora32_get_bandwidth(lora32_cfg_t *lora) {
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uint8_t bw = (lora32_read_reg(lora, REG_MODEM_CONFIG_1) >> 4);
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uint8_t bw = (lora32_read_reg(lora, REG_MODEM_CONFIG_1) >> 4);
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ESP_LOGI(TAG, "lora32_get_bandwidth: %d", bw);
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ESP_LOGV(TAG, "lora32_get_bandwidth: %d", bw);
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if(bw > 9) return -1;
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if(bw > 9) return -1;
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ESP_LOGI(TAG, "lora32_get_bandwidth: %ld", bandwidths[bw]);
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ESP_LOGD(TAG, "lora32_get_bandwidth: %ld", bandwidths[bw]);
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return bandwidths[bw];
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return bandwidths[bw];
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}
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}
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@ -324,20 +324,20 @@ long lora32_get_bandwidth(lora32_cfg_t *lora) {
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void lora32_set_ldo_flag(lora32_cfg_t *lora) {
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void lora32_set_ldo_flag(lora32_cfg_t *lora) {
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long symbolDuration = 1000 / (lora32_get_bandwidth(lora) / (1L << lora32_get_spreadfactor(lora)));
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long symbolDuration = 1000 / (lora32_get_bandwidth(lora) / (1L << lora32_get_spreadfactor(lora)));
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ESP_LOGI(TAG, "symbolDuration: %ld", symbolDuration);
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ESP_LOGD(TAG, "symbolDuration: %ld", symbolDuration);
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bool ldoOn = symbolDuration > 16;
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bool ldoOn = symbolDuration > 16;
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ESP_LOGI(TAG, "ldoOn: %d", ldoOn);
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ESP_LOGD(TAG, "ldoOn: %d", ldoOn);
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uint8_t modem_config_3 = lora32_read_reg(lora, REG_MODEM_CONFIG_3);
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uint8_t modem_config_3 = lora32_read_reg(lora, REG_MODEM_CONFIG_3);
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ESP_LOGI(TAG, "modem_config_3: %d", modem_config_3);
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ESP_LOGD(TAG, "modem_config_3: %d", modem_config_3);
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modem_config_3 |= ldoOn << 3;
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modem_config_3 |= ldoOn << 3;
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ESP_LOGI(TAG, "modem_config_3: %d", modem_config_3);
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ESP_LOGD(TAG, "modem_config_3: %d", modem_config_3);
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lora32_write_reg(lora, REG_MODEM_CONFIG_3, modem_config_3);
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lora32_write_reg(lora, REG_MODEM_CONFIG_3, modem_config_3);
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}
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}
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void lora32_set_bandwidth(lora32_cfg_t *lora, uint8_t bw) {
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void lora32_set_bandwidth(lora32_cfg_t *lora, uint8_t bw) {
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ESP_LOGI(TAG, "lora32_set_bandwidth: %d", bw);
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ESP_LOGD(TAG, "lora32_set_bandwidth: %d", bw);
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uint8_t modem_config_1 = lora32_read_reg(lora, REG_MODEM_CONFIG_1);
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uint8_t modem_config_1 = lora32_read_reg(lora, REG_MODEM_CONFIG_1);
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lora32_write_reg(lora, REG_MODEM_CONFIG_1, (modem_config_1 & 0x0F) | (bw << 4));
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lora32_write_reg(lora, REG_MODEM_CONFIG_1, (modem_config_1 & 0x0F) | (bw << 4));
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@ -351,7 +351,7 @@ void lora32_set_coding_rate(lora32_cfg_t *lora, uint8_t cr) {
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cr = cr - 4;
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cr = cr - 4;
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ESP_LOGI(TAG, "lora32_set_coding_rate: %d", cr + 4);
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ESP_LOGD(TAG, "lora32_set_coding_rate: %d", cr + 4);
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lora32_write_reg(lora, REG_MODEM_CONFIG_1, (lora32_read_reg(lora, REG_MODEM_CONFIG_1) & 0xF1) | (cr << 1));
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lora32_write_reg(lora, REG_MODEM_CONFIG_1, (lora32_read_reg(lora, REG_MODEM_CONFIG_1) & 0xF1) | (cr << 1));
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}
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}
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@ -365,7 +365,7 @@ void lora32_set_lna(lora32_cfg_t *lora, uint8_t gain) {
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uint8_t lna = lora32_read_reg(lora, REG_LNA);
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uint8_t lna = lora32_read_reg(lora, REG_LNA);
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lora32_write_reg(lora, REG_LNA, lna | gain);
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lora32_write_reg(lora, REG_LNA, lna | gain);
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ESP_LOGI(TAG, "set lna: 0x%2X", lna | gain);
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ESP_LOGD(TAG, "set lna: 0x%2X", lna | gain);
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}
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}
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static void lora32_handle_receive(lora32_cfg_t *lora) {
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static void lora32_handle_receive(lora32_cfg_t *lora) {
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@ -384,7 +384,7 @@ static void lora32_handle_receive(lora32_cfg_t *lora) {
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static void IRAM_ATTR lora32_dio_task(void *arg) {
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static void IRAM_ATTR lora32_dio_task(void *arg) {
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// allocate lora32_cfg_t to receive config from Queu
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// allocate lora32_cfg_t to receive config from Queu
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lora32_cfg_t *lora = malloc(sizeof(lora32_cfg_t));
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lora32_cfg_t *lora = malloc(sizeof(lora32_cfg_t));
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ESP_LOGI(TAG, "starting DIO handler task");
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ESP_LOGD(TAG, "starting DIO handler task");
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while(1) {
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while(1) {
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// wait for event over Queue
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// wait for event over Queue
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@ -431,12 +431,12 @@ static void IRAM_ATTR lora32_dio_task(void *arg) {
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}
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}
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if((irqs & IRQ_FHSS_CHANGE) == IRQ_FHSS_CHANGE) {
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if((irqs & IRQ_FHSS_CHANGE) == IRQ_FHSS_CHANGE) {
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ESP_LOGI(TAG, "switching channel %d: %d", lora->channel, lora->channels[lora->channel]);
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ESP_LOGD(TAG, "switching channel %d: %d", lora->channel, lora->channels[lora->channel]);
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if(lora->channel == 0 && lora->channels[lora->channel] == 0) continue;
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if(lora->channel == 0 && lora->channels[lora->channel] == 0) continue;
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if(lora->channels[lora->channel] == 0) {
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if(lora->channels[lora->channel] == 0) {
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ESP_LOGI(TAG, "reseting to channel 0");
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ESP_LOGD(TAG, "reseting to channel 0");
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lora->channel = 0;
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lora->channel = 0;
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}
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}
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@ -451,7 +451,7 @@ void lora32_read_data(lora32_cfg_t *lora, uint8_t *data) {
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uint8_t i = 0;
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uint8_t i = 0;
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uint8_t len = lora32_read_reg(lora, (lora->implicitHeader ? REG_PAYLOAD_LENGTH : REG_RX_NB_BYTES));
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uint8_t len = lora32_read_reg(lora, (lora->implicitHeader ? REG_PAYLOAD_LENGTH : REG_RX_NB_BYTES));
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ESP_LOGI(TAG, "Reading %d bytes", len);
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ESP_LOGD(TAG, "Reading %d bytes", len);
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for(i = 0; i < len; i++) {
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for(i = 0; i < len; i++) {
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data[i] = lora32_read_reg(lora, REG_FIFO);
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data[i] = lora32_read_reg(lora, REG_FIFO);
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@ -463,7 +463,7 @@ static void IRAM_ATTR lora32_on_dio(void *arg) {
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}
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}
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uint8_t lora32_spi_init(lora32_cfg_t *lora) {
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uint8_t lora32_spi_init(lora32_cfg_t *lora) {
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ESP_LOGI(TAG, "Initializing SPI bus");
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ESP_LOGD(TAG, "Initializing SPI bus");
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esp_err_t err = ESP_OK;
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esp_err_t err = ESP_OK;
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@ -499,7 +499,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
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lora32_toggle_reset(lora);
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lora32_toggle_reset(lora);
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// set NSS high
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// set NSS high
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ESP_LOGI(TAG, "Bringing NSS high: %d", lora->nss);
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ESP_LOGD(TAG, "Bringing NSS high: %d", lora->nss);
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gpio_set_level(lora->nss, 1);
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gpio_set_level(lora->nss, 1);
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vTaskDelay(10 / portTICK_PERIOD_MS);
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vTaskDelay(10 / portTICK_PERIOD_MS);
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@ -521,16 +521,18 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
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uint8_t version = lora32_read_reg(lora, REG_VERSION);
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uint8_t version = lora32_read_reg(lora, REG_VERSION);
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ESP_LOGD(TAG, "lora32_get_id() == 0x%2X", version);
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ESP_LOGD(TAG, "lora32_get_id() == 0x%2X", version);
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lora->version = version;
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// if ID does not match, something is likely wrong on the SPI bus
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// if ID does not match, something is likely wrong on the SPI bus
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if(version != 0x12) {
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if(version != 0x12) {
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ESP_LOGD(TAG, "REG_VERSION returned incorrectly. Expected 0x12 got 0x%02X", version);
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ESP_LOGE(TAG, "REG_VERSION returned incorrectly. Expected 0x12 got 0x%02X", version);
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return ERR_LOR_VERSION_MISMATCH;
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return ERR_LOR_VERSION_MISMATCH;
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}
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}
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// TODO: confirm this is happening. Before/after power measurements?
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// TODO: confirm this is happening. Before/after power measurements?
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lora32_sleep(lora);
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lora32_sleep(lora);
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ESP_LOGI(TAG, "lora32_sleep");
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ESP_LOGV(TAG, "lora32_sleep");
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// TODO: VERIFY
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// TODO: VERIFY
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lora32_set_frequency(lora, lora->frequency);
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lora32_set_frequency(lora, lora->frequency);
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@ -540,7 +542,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
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lora32_write_reg(lora, REG_FIFO_TX_BASE_ADDR, 0x00);
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lora32_write_reg(lora, REG_FIFO_TX_BASE_ADDR, 0x00);
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lora32_write_reg(lora, REG_FIFO_RX_BASE_ADDR, 0x00);
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lora32_write_reg(lora, REG_FIFO_RX_BASE_ADDR, 0x00);
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ESP_LOGI(TAG, "clear rx/tx fifos");
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ESP_LOGV(TAG, "clear rx/tx fifos");
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lora32_set_lna(lora, 0x03);
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lora32_set_lna(lora, 0x03);
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@ -549,10 +551,10 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
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// TODO make based on config
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// TODO make based on config
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lora32_set_tx_power(lora, 17, PA_OUTPUT_PA_BOOST_PIN);
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lora32_set_tx_power(lora, 17, PA_OUTPUT_PA_BOOST_PIN);
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ESP_LOGI(TAG, "lora32_set_tx_power");
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ESP_LOGV(TAG, "lora32_set_tx_power");
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lora32_standby(lora);
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lora32_standby(lora);
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ESP_LOGI(TAG, "lora32_standby");
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ESP_LOGV(TAG, "lora32_standby");
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if(lora->implicitHeader)
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if(lora->implicitHeader)
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lora23_set_implicit_header(lora);
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lora23_set_implicit_header(lora);
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@ -561,7 +563,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
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// TODO setup shouldn't be based on just receive callback
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// TODO setup shouldn't be based on just receive callback
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if(lora->receive != NULL) {
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if(lora->receive != NULL) {
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ESP_LOGI(TAG, "Setting GPIO Interrupt");
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ESP_LOGV(TAG, "Setting GPIO Interrupt");
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// TODO check at least one DIOx pin is not NULL
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// TODO check at least one DIOx pin is not NULL
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@ -578,7 +580,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
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// the DIO interrupt handling for every device is done from one task
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// the DIO interrupt handling for every device is done from one task
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if(dio_task_handle == NULL) {
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if(dio_task_handle == NULL) {
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ESP_LOGI(TAG, "Setting callback handler and ISR service");
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ESP_LOGV(TAG, "Setting callback handler and ISR service");
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// enable global ISR service
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// enable global ISR service
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gpio_install_isr_service(0);
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gpio_install_isr_service(0);
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@ -590,7 +592,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
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}
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}
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// add ISR handler to the global service started (once) above
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// add ISR handler to the global service started (once) above
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ESP_LOGI(TAG, "Installing ISR handler for GPIO%d", lora->dio0);
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ESP_LOGV(TAG, "Installing ISR handler for GPIO%d", lora->dio0);
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if(lora->dio0 > -1)
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if(lora->dio0 > -1)
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gpio_isr_handler_add(lora->dio0, lora32_on_dio, (void*)lora);
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gpio_isr_handler_add(lora->dio0, lora32_on_dio, (void*)lora);
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