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morgan:multidev-wip
morgan:dekconfig

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82
include/esp32-lora.h
View file

@ -22,9 +22,8 @@
#define REG_FIFO_RX_CURRENT_ADDR 0x10 #define REG_FIFO_RX_CURRENT_ADDR 0x10
#define REG_IRQ_FLAGS 0x12 #define REG_IRQ_FLAGS 0x12
#define REG_RX_NB_BYTES 0x13 #define REG_RX_NB_BYTES 0x13
#define REG_MODEM_STATUS 0x18
#define REG_PKT_RSSI_VALUE 0x1a #define REG_PKT_RSSI_VALUE 0x1a
#define REG_RSSI_VALUE 0x1b #define REG_PKT_SNR_VALUE 0x1b
#define REG_MODEM_CONFIG_1 0x1d #define REG_MODEM_CONFIG_1 0x1d
#define REG_MODEM_CONFIG_2 0x1e #define REG_MODEM_CONFIG_2 0x1e
#define REG_PREAMBLE_MSB 0x20 #define REG_PREAMBLE_MSB 0x20
@ -37,7 +36,6 @@
#define REG_DETECTION_THRESHOLD 0x37 #define REG_DETECTION_THRESHOLD 0x37
#define REG_SYNC_WORD 0x39 #define REG_SYNC_WORD 0x39
#define REG_DIO_MAPPING_1 0x40 #define REG_DIO_MAPPING_1 0x40
#define REG_DIO_MAPPING_2 0x41
#define REG_VERSION 0x42 #define REG_VERSION 0x42
#define REG_PA_DAC 0x4D #define REG_PA_DAC 0x4D
@ -49,7 +47,6 @@
#define MODE_RX_SINGLE 0x06 #define MODE_RX_SINGLE 0x06
#define MODE_CAD_DETECT 0x07 #define MODE_CAD_DETECT 0x07
#define MODE_LONG_RANGE_MODE 0x80 #define MODE_LONG_RANGE_MODE 0x80
#define MODE_ALL (MODE_SLEEP & MODE_STANDBY & MODE_TX & MODE_RX_CONTINUOUS & MODE_RX_SINGLE & MODE_CAD_DETECT)
// PA config // PA config
#define PA_BOOST 0x80 #define PA_BOOST 0x80
@ -75,55 +72,24 @@
#define DEFAULT_PREAMBLE 8 #define DEFAULT_PREAMBLE 8
#define DEFAULT_CR 5 #define DEFAULT_CR 5
#define DIO0_MODE_SHIFT 6 #define DIO0_MODE_RXDONE 0x00
#define DIO0_MODE_RXDONE 0b00 #define DIO0_MODE_TXDONE 0x40
#define DIO0_MODE_TXDONE 0b01 #define DIO0_MODE_CADDET 0x80
#define DIO0_MODE_CADDON 0b10
#define DIO1_MODE_SHIFT 4 #define EV_DIO0 (1 << 0)
#define DIO1_MODE_RXTIME 0b00
#define DIO1_MODE_FHSSCC 0b01
#define DIO1_MODE_CADDET 0b10
#define DIO3_MODE_SHIFT 2
#define DIO3_MODE_CADDON 0b00
#define DIO3_MODE_HEADVA 0b01
#define DIO3_MODE_CRCERR 0b10
#define DIO4_MODE_CADDET 0b00
#define DIO4_MODE_PLLLOC 0b10
#define DIO4_MODE_SHIFT 6
#define DIO5_MODE_SHIFT 4
#define ERR_LOR_VERSION_MISMATCH (01) #define ERR_LOR_VERSION_MISMATCH (01)
#define LORA32_DEFAULT_CONFIG() (lora32_cfg_t){\ enum freq {
.bandwidth = 7,\ F433, F866, F915
.codingRate = 5,\ } lora32_freq;
.frequency = 915000000,\
.spreadingFactor = 8,\
.preamble = DEFAULT_PREAMBLE,\
.implicitHeader = false,\
.useCRC = false,\
.fifoIdx = 0,\
.copi = 23,\
.cipo = 19,\
.clk = 18,\
.dio0 = 5,\
.dio1 = 12,\
.dio2 = 13,\
.nss = 15,\
.reset = 4,\
.spi_host = 1,\
}
typedef enum { typedef enum {
B78, B104, B156, B208, B3125, B417, B625, B125, B250, B500 B78, B104, B156, B208, B3125, B417, B625, B125, B250, B500
} bandwidth; } bandwidth;
extern const long long frequencies[3]; const long long frequencies[3];
extern const long bandwidths[10]; const long bandwidths[10];
typedef struct lora32_cfg_t lora32_cfg_t; typedef struct lora32_cfg_t lora32_cfg_t;
@ -133,32 +99,21 @@ typedef void (*cadDoneCallback)(lora32_cfg_t *lora, bool detected);
typedef void (*cadDetectedCallback)(lora32_cfg_t *lora); typedef void (*cadDetectedCallback)(lora32_cfg_t *lora);
typedef struct { typedef struct {
EventGroupHandle_t state; EventGroupHandle_t events;
void *driver;
} lora32_handle_t; } lora32_handle_t;
typedef struct lora32_modem_status_t {
unsigned int detected:1;
unsigned int synced:1;
unsigned int rx:1;
unsigned int valid:1;
unsigned int clear:1;
unsigned int cr:3;
} lora32_modem_status_t;
typedef struct lora32_cfg_t { typedef struct lora32_cfg_t {
uint8_t nss;
uint8_t cipo;
uint8_t copi;
uint8_t clk;
uint8_t reset;
uint8_t fifoIdx; uint8_t fifoIdx;
uint8_t channel; uint8_t channel;
uint8_t bandwidth; uint8_t bandwidth;
uint8_t spreadingFactor; uint8_t spreadingFactor;
uint8_t codingRate; uint8_t codingRate;
uint8_t version; // to be written on init by the driver
int8_t nss;
int8_t cipo;
int8_t copi;
int8_t clk;
int8_t reset;
int8_t dio0; int8_t dio0;
int8_t dio1; int8_t dio1;
int8_t dio2; int8_t dio2;
@ -186,8 +141,6 @@ typedef struct lora32_cfg_t {
uint8_t lora32_spi_init(lora32_cfg_t *config); uint8_t lora32_spi_init(lora32_cfg_t *config);
uint8_t lora32_init(lora32_cfg_t *config); uint8_t lora32_init(lora32_cfg_t *config);
uint8_t lora32_data_available(lora32_cfg_t *lora); uint8_t lora32_data_available(lora32_cfg_t *lora);
int16_t lora32_get_packet_rssi(lora32_cfg_t *lora);
int16_t lora32_get_rssi(lora32_cfg_t *lora);
double lora32_calc_datarate(lora32_cfg_t *lora); double lora32_calc_datarate(lora32_cfg_t *lora);
void lora32_dump_regs(lora32_cfg_t *lora); void lora32_dump_regs(lora32_cfg_t *lora);
@ -198,10 +151,9 @@ void lora32_enable_cad(lora32_cfg_t *lora);
void lora32_disable_fhss(lora32_cfg_t *lora); void lora32_disable_fhss(lora32_cfg_t *lora);
void lora32_toggle_reset(lora32_cfg_t *lora); void lora32_toggle_reset(lora32_cfg_t *lora);
void lora32_send(lora32_cfg_t *config, uint8_t *data, uint8_t len); void lora32_send(lora32_cfg_t *config, uint8_t *data, uint8_t len);
void lora32_set_bandwidth(lora32_cfg_t *lora, bandwidth bw); void lora32_set_bandwidth(lora32_cfg_t *lora, uint8_t bw);
void lora32_set_coding_rate(lora32_cfg_t *lora, uint8_t cr); void lora32_set_coding_rate(lora32_cfg_t *lora, uint8_t cr);
void lora32_set_spreadfactor(lora32_cfg_t *lora, uint8_t factor); void lora32_set_spreadfactor(lora32_cfg_t *lora, uint8_t factor);
uint8_t lora32_get_spreadfactor(lora32_cfg_t *lora);
void lora32_read_data(lora32_cfg_t *lora, uint8_t *data); void lora32_read_data(lora32_cfg_t *lora, uint8_t *data);
void lora32_sleep(lora32_cfg_t *lora); void lora32_sleep(lora32_cfg_t *lora);
void lora32_standby(lora32_cfg_t *lora); void lora32_standby(lora32_cfg_t *lora);

204
main/esp32-lora.c
View file

@ -11,7 +11,7 @@
#include "driver/gpio.h" #include "driver/gpio.h"
#include "driver/spi_common.h" #include "driver/spi_common.h"
#include "driver/spi_master.h" #include "driver/spi_master.h"
#include "spi_common_internal.h" #include "driver/spi_common_internal.h"
#include "esp32-lora.h" #include "esp32-lora.h"
@ -43,7 +43,7 @@ uint8_t lora32_read_reg(lora32_cfg_t *lora, uint8_t address) {
ESP_ERROR_CHECK(spi_device_transmit(lora->spi, &t)); ESP_ERROR_CHECK(spi_device_transmit(lora->spi, &t));
ESP_LOGV(TAG, "<%02X<%02X", address, t.rx_data[1]); ESP_LOGV(TAG, "<%2X<%2X", address, t.rx_data[1]);
xSemaphoreGive(spi_semaphore); xSemaphoreGive(spi_semaphore);
@ -70,27 +70,16 @@ void lora32_write_reg(lora32_cfg_t *lora, uint8_t address, uint8_t value) {
xSemaphoreGive(spi_semaphore); xSemaphoreGive(spi_semaphore);
}; };
void lora32_update_dio_mapping(lora32_cfg_t *lora, uint8_t reg, uint8_t value, uint8_t shift) {
uint8_t regdio1 = lora32_read_reg(lora, reg);
// clear bits
regdio1 &= ~(0b11 << shift);
// set new values
regdio1 |= (value << shift);
lora32_write_reg(lora, reg, regdio1);
}
double lora32_calc_datarate(lora32_cfg_t *lora) { double lora32_calc_datarate(lora32_cfg_t *lora) {
double cr = (4.0 / (long)lora->codingRate); double cr = (4.0 / (long)lora->codingRate);
double sf = pow(2, lora->spreadingFactor); double sf = pow(2, lora->spreadingFactor);
double c2 = sf / bandwidths[lora->bandwidth]; double c2 = sf / bandwidths[lora->bandwidth];
ESP_LOGD(TAG, "codingRate: %d cr: %f sf: %f c2: %f", lora->codingRate, cr, sf, c2); ESP_LOGI(TAG, "codingRate: %d cr: %f sf: %f c2: %f", lora->codingRate, cr, sf, c2);
return lora->spreadingFactor * cr / c2 * 1000; return lora->spreadingFactor * cr / c2 * 1000;
} }
void lora32_set_explicit_header(lora32_cfg_t *lora) { void lora23_set_explicit_header(lora32_cfg_t *lora) {
ESP_LOGD(TAG, "setting explicit header"); ESP_LOGD(TAG, "setting explicit header");
lora->implicitHeader = false; lora->implicitHeader = false;
@ -98,7 +87,7 @@ void lora32_set_explicit_header(lora32_cfg_t *lora) {
lora32_write_reg(lora, REG_MODEM_CONFIG_1, lora32_read_reg(lora, REG_MODEM_CONFIG_1) & 0xFE); lora32_write_reg(lora, REG_MODEM_CONFIG_1, lora32_read_reg(lora, REG_MODEM_CONFIG_1) & 0xFE);
} }
void lora32_set_implicit_header(lora32_cfg_t *lora) { void lora23_set_implicit_header(lora32_cfg_t *lora) {
ESP_LOGD(TAG, "setting implicit header"); ESP_LOGD(TAG, "setting implicit header");
lora->implicitHeader = true; lora->implicitHeader = true;
@ -109,16 +98,12 @@ void lora32_set_implicit_header(lora32_cfg_t *lora) {
void lora32_standby(lora32_cfg_t *lora) { void lora32_standby(lora32_cfg_t *lora) {
ESP_LOGV(TAG, "MODE_STANDBY"); ESP_LOGV(TAG, "MODE_STANDBY");
xEventGroupSetBits(lora->handle.state, MODE_STANDBY);
lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_STANDBY); lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_STANDBY);
} }
void lora32_sleep(lora32_cfg_t *lora) { void lora32_sleep(lora32_cfg_t *lora) {
ESP_LOGV(TAG, "MODE_SLEEP"); ESP_LOGV(TAG, "MODE_SLEEP");
xEventGroupSetBits(lora->handle.state, MODE_SLEEP);
lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_SLEEP); lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_SLEEP);
} }
@ -138,11 +123,9 @@ void lora32_enable_tx(lora32_cfg_t *lora) {
lora32_standby(lora); lora32_standby(lora);
if(lora->implicitHeader) if(lora->implicitHeader)
lora32_set_implicit_header(lora); lora23_set_implicit_header(lora);
else else
lora32_set_explicit_header(lora); lora23_set_explicit_header(lora);
xEventGroupSetBits(lora->handle.state, MODE_TX);
// zero out receive buffer // zero out receive buffer
lora32_write_reg(lora, REG_FIFO_ADDR_PTR, 0); lora32_write_reg(lora, REG_FIFO_ADDR_PTR, 0);
@ -150,21 +133,9 @@ void lora32_enable_tx(lora32_cfg_t *lora) {
} }
void lora32_send(lora32_cfg_t *lora, uint8_t *data, uint8_t len) { void lora32_send(lora32_cfg_t *lora, uint8_t *data, uint8_t len) {
if(lora == NULL) {
ESP_LOGE(TAG, "lora NULL");
return;
} else {
ESP_LOGD(TAG, "lora: %p", lora);
}
if((xEventGroupGetBits(lora->handle.state) & MODE_TX) == MODE_TX) {
xEventGroupWaitBits(lora->handle.state, MODE_ALL ^ MODE_TX, true, false, portMAX_DELAY);
}
ESP_ERROR_CHECK(spi_device_acquire_bus(lora->spi, portMAX_DELAY)); ESP_ERROR_CHECK(spi_device_acquire_bus(lora->spi, portMAX_DELAY));
lora32_update_dio_mapping(lora, REG_DIO_MAPPING_1, DIO0_MODE_TXDONE, DIO0_MODE_SHIFT); lora32_write_reg(lora, REG_DIO_MAPPING_1, DIO0_MODE_TXDONE);
lora32_enable_tx(lora); lora32_enable_tx(lora);
@ -180,12 +151,12 @@ void lora32_send(lora32_cfg_t *lora, uint8_t *data, uint8_t len) {
} }
void lora32_set_frequency(lora32_cfg_t *lora, long frequency) { void lora32_set_frequency(lora32_cfg_t *lora, long frequency) {
ESP_LOGD(TAG, "lora32_set_frequency: %lu", frequency); ESP_LOGI(TAG, "lora32_set_frequency: %lu", frequency);
uint64_t frf = ((uint64_t)frequency << 19) / 32000000; uint64_t frf = ((uint64_t)frequency << 19) / 32000000;
ESP_LOGD(TAG, "REG_FRF_MSB: 0x%2X", (uint8_t)(frf >> 16)); ESP_LOGI(TAG, "REG_FRF_MSB: 0x%2X", (uint8_t)(frf >> 16));
ESP_LOGD(TAG, "REG_FRF_MID: 0x%2X", (uint8_t)(frf >> 8)); ESP_LOGI(TAG, "REG_FRF_MID: 0x%2X", (uint8_t)(frf >> 8));
ESP_LOGD(TAG, "REG_FRF_LSB: 0x%2X", (uint8_t)(frf >> 0)); ESP_LOGI(TAG, "REG_FRF_LSB: 0x%2X", (uint8_t)(frf >> 0));
lora32_write_reg(lora, REG_FRF_MSB, (uint8_t)(frf >> 16)); lora32_write_reg(lora, REG_FRF_MSB, (uint8_t)(frf >> 16));
lora32_write_reg(lora, REG_FRF_MID, (uint8_t)(frf >> 8)); lora32_write_reg(lora, REG_FRF_MID, (uint8_t)(frf >> 8));
@ -223,7 +194,7 @@ void lora32_set_tx_power(lora32_cfg_t *lora, uint8_t level, uint8_t output) {
lora32_write_reg(lora, REG_PA_CONFIG, PA_BOOST | (level - 2)); lora32_write_reg(lora, REG_PA_CONFIG, PA_BOOST | (level - 2));
} }
ESP_LOGD(TAG, "set_tx_power(%d, %d)", level, output); ESP_LOGI(TAG, "set_tx_power(%d, %d)", level, output);
ESP_LOGD(TAG, "REG_PA_CONFIG: 0x%2X", lora32_read_reg(lora, REG_PA_CONFIG)); ESP_LOGD(TAG, "REG_PA_CONFIG: 0x%2X", lora32_read_reg(lora, REG_PA_CONFIG));
} }
@ -260,7 +231,7 @@ void lora32_dump_regs(lora32_cfg_t *lora) {
void lora32_toggle_reset(lora32_cfg_t *config) { void lora32_toggle_reset(lora32_cfg_t *config) {
// toggle reset (L/H) // toggle reset (L/H)
ESP_LOGD(TAG, "Toggling reset pin %d", config->reset); ESP_LOGI(TAG, "Toggling reset pin %d", config->reset);
gpio_set_level(config->reset, 0); gpio_set_level(config->reset, 0);
vTaskDelay(100 / portTICK_PERIOD_MS); // requires 100us vTaskDelay(100 / portTICK_PERIOD_MS); // requires 100us
@ -269,7 +240,7 @@ void lora32_toggle_reset(lora32_cfg_t *config) {
vTaskDelay(100 / portTICK_PERIOD_MS); // 5ms before available vTaskDelay(100 / portTICK_PERIOD_MS); // 5ms before available
} }
uint8_t lora32_get_spreadfactor(lora32_cfg_t *lora) { uint8_t lora32_get_spreadingfactor(lora32_cfg_t *lora) {
return (lora32_read_reg(lora, REG_MODEM_CONFIG_2) >> 4); return (lora32_read_reg(lora, REG_MODEM_CONFIG_2) >> 4);
} }
@ -286,106 +257,75 @@ void lora32_set_spreadfactor(lora32_cfg_t *lora, uint8_t factor) {
lora32_write_reg(lora, REG_DETECTION_THRESHOLD, DETECT_THRES_OTHER); lora32_write_reg(lora, REG_DETECTION_THRESHOLD, DETECT_THRES_OTHER);
} }
ESP_LOGD(TAG, "lora32_set_spreadfactor: %d", factor); ESP_LOGI(TAG, "lora32_set_spreadfactor: %d", factor);
lora32_write_reg(lora, REG_MODEM_CONFIG_2, (lora32_read_reg(lora, REG_MODEM_CONFIG_2) & 0x0F) | ((factor << 4) & 0xF0)); lora32_write_reg(lora, REG_MODEM_CONFIG_2, (lora32_read_reg(lora, REG_MODEM_CONFIG_2) & 0x0F) | ((factor << 4) & 0xF0));
lora->spreadingFactor = factor;
}
lora32_modem_status_t lora32_get_status(lora32_cfg_t *lora) {
lora32_modem_status_t modem_status;
uint8_t status = lora32_read_reg(lora, REG_MODEM_STATUS);
memcpy(&modem_status, &status, 1);
return modem_status;
} }
void lora32_enable_single_rx(lora32_cfg_t *lora) { void lora32_enable_single_rx(lora32_cfg_t *lora) {
ESP_LOGD(TAG, "MODE_RX_SINGLE"); ESP_LOGD(TAG, "MODE_RX_SINGLE");
lora32_standby(lora);
if(lora->receive != NULL) { if(lora->receive != NULL) {
lora32_update_dio_mapping(lora, REG_DIO_MAPPING_1, DIO0_MODE_RXDONE, DIO0_MODE_SHIFT); lora32_write_reg(lora, REG_DIO_MAPPING_1, DIO0_MODE_RXDONE);
} }
xEventGroupSetBits(lora->handle.state, MODE_RX_SINGLE); lora32_standby(lora);
lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_RX_SINGLE); lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_RX_SINGLE);
} }
void lora32_enable_continuous_rx(lora32_cfg_t *lora) { void lora32_enable_continuous_rx(lora32_cfg_t *lora) {
ESP_LOGD(TAG, "MODE_RX_CONTINUOUS"); ESP_LOGD(TAG, "MODE_RX_CONTINUOUS");
lora32_standby(lora);
if(lora->receive != NULL) { if(lora->receive != NULL) {
lora32_update_dio_mapping(lora, REG_DIO_MAPPING_1, DIO0_MODE_RXDONE, DIO0_MODE_SHIFT); lora32_write_reg(lora, REG_DIO_MAPPING_1, DIO0_MODE_RXDONE);
} }
xEventGroupSetBits(lora->handle.state, MODE_RX_CONTINUOUS); lora32_standby(lora);
lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_RX_CONTINUOUS); lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_RX_CONTINUOUS);
} }
void lora32_enable_cad(lora32_cfg_t *lora) { void lora32_enable_cad(lora32_cfg_t *lora) {
lora32_standby(lora); if((lora->cad_done != NULL) | (lora->cad_detected != NULL)) {
ESP_LOGD(TAG, "Setting DIO0 to CAD Detect");
if(lora->cad_done != NULL) { lora32_write_reg(lora, REG_DIO_MAPPING_1, DIO0_MODE_CADDET);
ESP_LOGV(TAG, "Setting DIO0 to CAD Done");
lora32_update_dio_mapping(lora, REG_DIO_MAPPING_1, DIO0_MODE_CADDON, DIO0_MODE_SHIFT);
} }
if(lora->cad_detected != NULL) { ESP_LOGD(TAG, "MODE_CAD_DETECT");
ESP_LOGV(TAG, "Setting DIO1 to CAD Detect");
lora32_update_dio_mapping(lora, REG_DIO_MAPPING_1, DIO1_MODE_CADDET, DIO1_MODE_SHIFT);
}
ESP_LOGV(TAG, "MODE_CAD_DETECT");
xEventGroupSetBits(lora->handle.state, MODE_CAD_DETECT);
lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_CAD_DETECT); lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_CAD_DETECT);
} }
int16_t lora32_get_rssi(lora32_cfg_t *lora) {
// TODO support LF output constant of -164
return (-157 + lora32_read_reg(lora, REG_RSSI_VALUE)) & 0xffff;
}
int16_t lora32_get_packet_rssi(lora32_cfg_t *lora) {
// TODO support LF output constant of -164
return 0x0000 | (-157 + lora32_read_reg(lora, REG_PKT_RSSI_VALUE));
}
long lora32_get_bandwidth(lora32_cfg_t *lora) { long lora32_get_bandwidth(lora32_cfg_t *lora) {
uint8_t bw = (lora32_read_reg(lora, REG_MODEM_CONFIG_1) >> 4); uint8_t bw = (lora32_read_reg(lora, REG_MODEM_CONFIG_1) >> 4);
ESP_LOGV(TAG, "lora32_get_bandwidth: %d", bw); ESP_LOGI(TAG, "lora32_get_bandwidth: %d", bw);
if(bw > 9) return -1; if(bw > 9) return -1;
ESP_LOGD(TAG, "lora32_get_bandwidth: %ld", bandwidths[bw]); ESP_LOGI(TAG, "lora32_get_bandwidth: %ld", bandwidths[bw]);
return bandwidths[bw]; return bandwidths[bw];
} }
void lora32_set_ldo_flag(lora32_cfg_t *lora) { void lora32_set_ldo_flag(lora32_cfg_t *lora) {
long symbolDuration = 1000 / (lora32_get_bandwidth(lora) / (1L << lora32_get_spreadfactor(lora))); long symbolDuration = 1000 / (lora32_get_bandwidth(lora) / (1L << lora32_get_spreadingfactor(lora)));
ESP_LOGD(TAG, "symbolDuration: %ld", symbolDuration); ESP_LOGI(TAG, "symbolDuration: %ld", symbolDuration);
bool ldoOn = symbolDuration > 16; bool ldoOn = symbolDuration > 16;
ESP_LOGD(TAG, "ldoOn: %d", ldoOn); ESP_LOGI(TAG, "ldoOn: %d", ldoOn);
uint8_t modem_config_3 = lora32_read_reg(lora, REG_MODEM_CONFIG_3); uint8_t modem_config_3 = lora32_read_reg(lora, REG_MODEM_CONFIG_3);
ESP_LOGD(TAG, "modem_config_3: %d", modem_config_3); ESP_LOGI(TAG, "modem_config_3: %d", modem_config_3);
modem_config_3 |= ldoOn << 3; modem_config_3 |= ldoOn << 3;
ESP_LOGD(TAG, "modem_config_3: %d", modem_config_3); ESP_LOGI(TAG, "modem_config_3: %d", modem_config_3);
lora32_write_reg(lora, REG_MODEM_CONFIG_3, modem_config_3); lora32_write_reg(lora, REG_MODEM_CONFIG_3, modem_config_3);
} }
void lora32_set_bandwidth(lora32_cfg_t *lora, bandwidth bw) { void lora32_set_bandwidth(lora32_cfg_t *lora, uint8_t bw) {
ESP_LOGD(TAG, "lora32_set_bandwidth: %d", bw); ESP_LOGI(TAG, "lora32_set_bandwidth: %d", bw);
uint8_t modem_config_1 = lora32_read_reg(lora, REG_MODEM_CONFIG_1); uint8_t modem_config_1 = lora32_read_reg(lora, REG_MODEM_CONFIG_1);
lora32_write_reg(lora, REG_MODEM_CONFIG_1, (modem_config_1 & 0x0F) | (bw << 4)); lora32_write_reg(lora, REG_MODEM_CONFIG_1, (modem_config_1 & 0x0F) | (bw << 4));
@ -399,7 +339,7 @@ void lora32_set_coding_rate(lora32_cfg_t *lora, uint8_t cr) {
cr = cr - 4; cr = cr - 4;
ESP_LOGD(TAG, "lora32_set_coding_rate: %d", cr + 4); ESP_LOGI(TAG, "lora32_set_coding_rate: %d", cr + 4);
lora32_write_reg(lora, REG_MODEM_CONFIG_1, (lora32_read_reg(lora, REG_MODEM_CONFIG_1) & 0xF1) | (cr << 1)); lora32_write_reg(lora, REG_MODEM_CONFIG_1, (lora32_read_reg(lora, REG_MODEM_CONFIG_1) & 0xF1) | (cr << 1));
} }
@ -413,7 +353,7 @@ void lora32_set_lna(lora32_cfg_t *lora, uint8_t gain) {
uint8_t lna = lora32_read_reg(lora, REG_LNA); uint8_t lna = lora32_read_reg(lora, REG_LNA);
lora32_write_reg(lora, REG_LNA, lna | gain); lora32_write_reg(lora, REG_LNA, lna | gain);
ESP_LOGD(TAG, "set lna: 0x%2X", lna | gain); ESP_LOGI(TAG, "set lna: 0x%2X", lna | gain);
} }
static void lora32_handle_receive(lora32_cfg_t *lora) { static void lora32_handle_receive(lora32_cfg_t *lora) {
@ -432,23 +372,26 @@ static void lora32_handle_receive(lora32_cfg_t *lora) {
static void IRAM_ATTR lora32_dio_task(void *arg) { static void IRAM_ATTR lora32_dio_task(void *arg) {
// allocate lora32_cfg_t to receive config from Queu // allocate lora32_cfg_t to receive config from Queu
lora32_cfg_t *lora = malloc(sizeof(lora32_cfg_t)); lora32_cfg_t *lora = malloc(sizeof(lora32_cfg_t));
ESP_LOGD(TAG, "starting DIO handler task"); ESP_LOGI(TAG, "starting DIO handler task");
while(1) { while(1) {
// wait for event over Queue // wait for event over Queue
if(xQueueReceive(dio_event_queue, (void*)&lora, portMAX_DELAY) != pdPASS) continue; if(xQueueReceive(dio_event_queue, (void*)lora, portMAX_DELAY) != pdPASS) continue;
//spi_device_acquire_bus(lora->spi, portMAX_DELAY); // need a better way to log which event and from which config
//ESP_LOGI(TAG, "handling DIO0 on GPIO%d", lora->dio0);
spi_device_acquire_bus(lora->spi, portMAX_DELAY);
// read IRQ flags // read IRQ flags
uint8_t irqs = lora32_read_reg(lora, REG_IRQ_FLAGS); uint8_t irqs = lora32_read_reg(lora, REG_IRQ_FLAGS);
ESP_LOGD(TAG, "reading irqs: 0x%02X", irqs); ESP_LOGD(TAG, "reading irqs: %02X", irqs);
// clear IRQ flags by writing mask back // clear IRQ flags by writing mask back
ESP_LOGD(TAG, "clearing irqs"); ESP_LOGD(TAG, "clearing irqs");
lora32_write_reg(lora, REG_IRQ_FLAGS, irqs); lora32_write_reg(lora, REG_IRQ_FLAGS, irqs);
//spi_device_release_bus(lora->spi); spi_device_release_bus(lora->spi);
// TODO handle header validation // TODO handle header validation
if((irqs & IRQ_RX_DONE) == IRQ_RX_DONE) { if((irqs & IRQ_RX_DONE) == IRQ_RX_DONE) {
@ -476,12 +419,12 @@ static void IRAM_ATTR lora32_dio_task(void *arg) {
} }
if((irqs & IRQ_FHSS_CHANGE) == IRQ_FHSS_CHANGE) { if((irqs & IRQ_FHSS_CHANGE) == IRQ_FHSS_CHANGE) {
ESP_LOGD(TAG, "switching channel %d: %d", lora->channel, lora->channels[lora->channel]); ESP_LOGI(TAG, "switching channel %d: %d", lora->channel, lora->channels[lora->channel]);
if(lora->channel == 0 && lora->channels[lora->channel] == 0) continue; if(lora->channel == 0 && lora->channels[lora->channel] == 0) continue;
if(lora->channels[lora->channel] == 0) { if(lora->channels[lora->channel] == 0) {
ESP_LOGD(TAG, "reseting to channel 0"); ESP_LOGI(TAG, "reseting to channel 0");
lora->channel = 0; lora->channel = 0;
} }
@ -496,7 +439,7 @@ void lora32_read_data(lora32_cfg_t *lora, uint8_t *data) {
uint8_t i = 0; uint8_t i = 0;
uint8_t len = lora32_read_reg(lora, (lora->implicitHeader ? REG_PAYLOAD_LENGTH : REG_RX_NB_BYTES)); uint8_t len = lora32_read_reg(lora, (lora->implicitHeader ? REG_PAYLOAD_LENGTH : REG_RX_NB_BYTES));
ESP_LOGD(TAG, "Reading %d bytes", len); ESP_LOGI(TAG, "Reading %d bytes", len);
for(i = 0; i < len; i++) { for(i = 0; i < len; i++) {
data[i] = lora32_read_reg(lora, REG_FIFO); data[i] = lora32_read_reg(lora, REG_FIFO);
@ -504,11 +447,11 @@ void lora32_read_data(lora32_cfg_t *lora, uint8_t *data) {
} }
static void IRAM_ATTR lora32_on_dio(void *arg) { static void IRAM_ATTR lora32_on_dio(void *arg) {
xQueueSendFromISR(dio_event_queue, (void*)&arg, pdFALSE); xQueueSend(dio_event_queue, arg, (TickType_t)0);
} }
uint8_t lora32_spi_init(lora32_cfg_t *lora) { uint8_t lora32_spi_init(lora32_cfg_t *lora) {
ESP_LOGD(TAG, "Initializing SPI bus"); ESP_LOGI(TAG, "Initializing SPI bus");
esp_err_t err = ESP_OK; esp_err_t err = ESP_OK;
@ -534,7 +477,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
} }
gpio_config_t io_conf; gpio_config_t io_conf;
io_conf.intr_type = GPIO_INTR_DISABLE; io_conf.intr_type = GPIO_PIN_INTR_DISABLE;
io_conf.mode = GPIO_MODE_OUTPUT; io_conf.mode = GPIO_MODE_OUTPUT;
io_conf.pin_bit_mask = (1ULL<<lora->reset)|(1ULL<<lora->nss); io_conf.pin_bit_mask = (1ULL<<lora->reset)|(1ULL<<lora->nss);
@ -544,7 +487,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
lora32_toggle_reset(lora); lora32_toggle_reset(lora);
// set NSS high // set NSS high
ESP_LOGD(TAG, "Bringing NSS high: %d", lora->nss); ESP_LOGI(TAG, "Bringing NSS high: %d", lora->nss);
gpio_set_level(lora->nss, 1); gpio_set_level(lora->nss, 1);
vTaskDelay(10 / portTICK_PERIOD_MS); vTaskDelay(10 / portTICK_PERIOD_MS);
@ -561,24 +504,21 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
ESP_ERROR_CHECK(spi_bus_add_device(lora->spi_host, &devcfg, &lora->spi)); ESP_ERROR_CHECK(spi_bus_add_device(lora->spi_host, &devcfg, &lora->spi));
// initialize event groups // initialize event groups
lora->handle.state = xEventGroupCreate(); lora->handle.events = xEventGroupCreate();
xEventGroupSetBits(lora->handle.state, 0);
uint8_t version = lora32_read_reg(lora, REG_VERSION); uint8_t version = lora32_read_reg(lora, REG_VERSION);
ESP_LOGD(TAG, "lora32_get_id() == 0x%2X", version); ESP_LOGD(TAG, "lora32_get_id() == 0x%2X", version);
lora->version = version;
// if ID does not match, something is likely wrong on the SPI bus // if ID does not match, something is likely wrong on the SPI bus
if(version != 0x12) { if(version != 0x12) {
ESP_LOGE(TAG, "REG_VERSION returned incorrectly. Expected 0x12 got 0x%02X", version); ESP_LOGD(TAG, "REG_VERSION returned incorrectly. Expected 0x12 got 0x%02X", version);
return ERR_LOR_VERSION_MISMATCH; return ERR_LOR_VERSION_MISMATCH;
} }
// TODO: confirm this is happening. Before/after power measurements? // TODO: confirm this is happening. Before/after power measurements?
lora32_sleep(lora); lora32_sleep(lora);
ESP_LOGV(TAG, "lora32_sleep"); ESP_LOGI(TAG, "lora32_sleep");
// TODO: VERIFY // TODO: VERIFY
lora32_set_frequency(lora, lora->frequency); lora32_set_frequency(lora, lora->frequency);
@ -588,7 +528,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
lora32_write_reg(lora, REG_FIFO_TX_BASE_ADDR, 0x00); lora32_write_reg(lora, REG_FIFO_TX_BASE_ADDR, 0x00);
lora32_write_reg(lora, REG_FIFO_RX_BASE_ADDR, 0x00); lora32_write_reg(lora, REG_FIFO_RX_BASE_ADDR, 0x00);
ESP_LOGV(TAG, "clear rx/tx fifos"); ESP_LOGI(TAG, "clear rx/tx fifos");
lora32_set_lna(lora, 0x03); lora32_set_lna(lora, 0x03);
@ -597,52 +537,48 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
// TODO make based on config // TODO make based on config
lora32_set_tx_power(lora, 17, PA_OUTPUT_PA_BOOST_PIN); lora32_set_tx_power(lora, 17, PA_OUTPUT_PA_BOOST_PIN);
ESP_LOGV(TAG, "lora32_set_tx_power"); ESP_LOGI(TAG, "lora32_set_tx_power");
lora32_standby(lora); lora32_standby(lora);
ESP_LOGV(TAG, "lora32_standby"); ESP_LOGI(TAG, "lora32_standby");
if(lora->implicitHeader) if(lora->implicitHeader)
lora32_set_implicit_header(lora); lora23_set_implicit_header(lora);
else else
lora32_set_explicit_header(lora); lora23_set_explicit_header(lora);
// TODO setup shouldn't be based on just receive callback // TODO setup shouldn't be based on just receive callback
if(lora->receive != NULL) { if(lora->receive != NULL) {
ESP_LOGV(TAG, "Setting GPIO Interrupt"); ESP_LOGI(TAG, "Setting GPIO Interrupt");
// TODO check at least one DIOx pin is not NULL // TODO check at least one DIOx pin is not NULL
uint64_t pin_bit_mask = 0; io_conf.intr_type = GPIO_PIN_INTR_POSEDGE;
if(lora->dio0 > -1) io_conf.pin_bit_mask = ((1ULL << lora->dio0) | (1ULL << lora->dio1) | (1ULL << lora->dio2));
pin_bit_mask |= (1 << lora->dio0);
if(lora->dio1 > -1)
pin_bit_mask |= (1 << lora->dio1);
if(lora->dio2 > -1)
pin_bit_mask |= (1 << lora->dio2);
io_conf.intr_type = GPIO_INTR_POSEDGE;
io_conf.pin_bit_mask = pin_bit_mask;
io_conf.mode = GPIO_MODE_INPUT; io_conf.mode = GPIO_MODE_INPUT;
io_conf.pull_down_en = 1; io_conf.pull_down_en = 0;
io_conf.pull_up_en = 0; io_conf.pull_up_en = 0;
gpio_config(&io_conf); gpio_config(&io_conf);
gpio_set_intr_type(lora->dio0, GPIO_INTR_POSEDGE);
gpio_set_intr_type(lora->dio1, GPIO_INTR_POSEDGE);
gpio_set_intr_type(lora->dio2, GPIO_INTR_POSEDGE);
// the DIO interrupt handling for every device is done from one task // the DIO interrupt handling for every device is done from one task
if(dio_task_handle == NULL) { if(dio_task_handle == NULL) {
ESP_LOGV(TAG, "Setting callback handler and ISR service"); ESP_LOGI(TAG, "Setting callback handler and ISR service");
// enable global ISR service // enable global ISR service
gpio_install_isr_service(0); gpio_install_isr_service(0);
dio_event_queue = xQueueCreate(10, sizeof(lora32_cfg_t *)); dio_event_queue = xQueueCreate(10, sizeof(lora32_cfg_t));
// this should probably be high priority // this should probably be high priority
xTaskCreate(&lora32_dio_task, "lora32_dio_task", 4096, NULL, 6, &dio_task_handle); xTaskCreate(&lora32_dio_task, "lora32_dio_task", 4096, NULL, 6, &dio_task_handle);
} }
// add ISR handler to the global service started (once) above // add ISR handler to the global service started (once) above
ESP_LOGV(TAG, "Installing ISR handler for GPIO%d", lora->dio0); ESP_LOGI(TAG, "Installing ISR handler for GPIO%d", lora->dio0);
if(lora->dio0 > -1) if(lora->dio0 > -1)
gpio_isr_handler_add(lora->dio0, lora32_on_dio, (void*)lora); gpio_isr_handler_add(lora->dio0, lora32_on_dio, (void*)lora);
@ -653,5 +589,5 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
gpio_isr_handler_add(lora->dio2, lora32_on_dio, (void*)lora); gpio_isr_handler_add(lora->dio2, lora32_on_dio, (void*)lora);
} }
return ESP_OK; return 1;
}; };