update GPIO const names
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parent
ad717a6978
commit
c71ed05f8f
1 changed files with 4 additions and 4 deletions
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@ -11,7 +11,7 @@
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#include "driver/gpio.h"
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#include "driver/gpio.h"
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#include "driver/spi_common.h"
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#include "driver/spi_common.h"
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#include "driver/spi_master.h"
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#include "driver/spi_master.h"
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#include "driver/spi_common_internal.h"
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#include "spi_common_internal.h"
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#include "esp32-lora.h"
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#include "esp32-lora.h"
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@ -270,7 +270,7 @@ void lora32_set_spreadfactor(lora32_cfg_t *lora, uint8_t factor) {
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lora32_write_reg(lora, REG_DETECTION_THRESHOLD, DETECT_THRES_OTHER);
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lora32_write_reg(lora, REG_DETECTION_THRESHOLD, DETECT_THRES_OTHER);
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}
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}
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ESP_LOGV(TAG, "lora32_set_spreadfactor: %d", factor);
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ESP_LOGD(TAG, "lora32_set_spreadfactor: %d", factor);
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lora32_write_reg(lora, REG_MODEM_CONFIG_2, (lora32_read_reg(lora, REG_MODEM_CONFIG_2) & 0x0F) | ((factor << 4) & 0xF0));
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lora32_write_reg(lora, REG_MODEM_CONFIG_2, (lora32_read_reg(lora, REG_MODEM_CONFIG_2) & 0x0F) | ((factor << 4) & 0xF0));
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@ -514,7 +514,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
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}
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}
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gpio_config_t io_conf;
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gpio_config_t io_conf;
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io_conf.intr_type = GPIO_PIN_INTR_DISABLE;
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io_conf.intr_type = GPIO_INTR_DISABLE;
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io_conf.mode = GPIO_MODE_OUTPUT;
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io_conf.mode = GPIO_MODE_OUTPUT;
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io_conf.pin_bit_mask = (1ULL<<lora->reset)|(1ULL<<lora->nss);
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io_conf.pin_bit_mask = (1ULL<<lora->reset)|(1ULL<<lora->nss);
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@ -600,7 +600,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
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if(lora->dio2 > -1)
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if(lora->dio2 > -1)
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pin_bit_mask |= (1 << lora->dio2);
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pin_bit_mask |= (1 << lora->dio2);
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io_conf.intr_type = GPIO_PIN_INTR_POSEDGE;
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io_conf.intr_type = GPIO_INTR_POSEDGE;
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io_conf.pin_bit_mask = pin_bit_mask;
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io_conf.pin_bit_mask = pin_bit_mask;
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io_conf.mode = GPIO_MODE_INPUT;
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io_conf.mode = GPIO_MODE_INPUT;
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io_conf.pull_down_en = 1;
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io_conf.pull_down_en = 1;
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