morgan/esp32-lora
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Merge branch 'fhss' into fhss-merge (development)

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Morgan 'ARR\!' Allen 2021-12-08 12:32:06 -08:00
commit e912b54cba
2 changed files with 55 additions and 8 deletions
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17
include/esp32-lora.h
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@ -29,6 +29,7 @@
#define REG_PREAMBLE_MSB 0x20
#define REG_PREAMBLE_LSB 0x21
#define REG_PAYLOAD_LENGTH 0x22
#define REG_HOP_PERIOD 0x24
#define REG_MODEM_CONFIG_3 0x26
#define REG_RSSI_WIDEBAND 0x2c
#define REG_DETECTION_OPTIMIZE 0x31
@ -106,19 +107,25 @@ typedef struct lora32_cfg_t {
uint8_t cipo;
uint8_t copi;
uint8_t clk;
uint8_t dio0;
uint8_t reset;
uint8_t fifoIdx;
long frequency;
uint8_t channel;
uint8_t bandwidth;
uint8_t spreadingFactor;
uint8_t codingRate;
int8_t dio0;
int8_t dio1;
int8_t dio2;
int8_t channels[64];
long frequency;
uint16_t preamble;
bool useCRC;
bool implicitHeader;
bool enableFHSS;
receiveCallback receive;
txdoneCallback tx_done;
@ -137,9 +144,11 @@ uint8_t lora32_data_available(lora32_cfg_t *lora);
double lora32_calc_datarate(lora32_cfg_t *lora);
void lora32_dump_regs(lora32_cfg_t *lora);
void lora32_enable_fhss(lora32_cfg_t *lora, uint8_t period);
void lora32_enable_continuous_rx(lora32_cfg_t *lora);
void lora32_enable_single_rx(lora32_cfg_t *lora);
void lora32_enable_cad(lora32_cfg_t *lora);
void lora32_disable_fhss(lora32_cfg_t *lora);
void lora32_toggle_reset(lora32_cfg_t *lora);
void lora32_send(lora32_cfg_t *config, uint8_t *data, uint8_t len);
void lora32_set_bandwidth(lora32_cfg_t *lora, uint8_t bw);

46
main/esp32-lora.c
View file

@ -107,6 +107,18 @@ void lora32_sleep(lora32_cfg_t *lora) {
lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_SLEEP);
}
void lora32_enable_fhss(lora32_cfg_t *lora, uint8_t period) {
lora->enableFHSS = true;
lora32_write_reg(lora, REG_HOP_PERIOD, period);
}
void lora32_disable_fhss(lora32_cfg_t *lora) {
lora->enableFHSS = false;
lora32_write_reg(lora, REG_HOP_PERIOD, 0);
}
void lora32_enable_tx(lora32_cfg_t *lora) {
lora32_standby(lora);
@ -364,7 +376,7 @@ static void IRAM_ATTR lora32_dio_task(void *arg) {
while(1) {
// wait for event over Queue
if(xQueueReceive(dio_event_queue, (void*)lora, portMAX_DELAY) != pdPASS) continue;
if(xQueueReceive(dio_event_queue, (void*)&lora, portMAX_DELAY) != pdPASS) continue;
// need a better way to log which event and from which config
//ESP_LOGI(TAG, "handling DIO0 on GPIO%d", lora->dio0);
@ -405,6 +417,21 @@ static void IRAM_ATTR lora32_dio_task(void *arg) {
// these *should* fire at the same time, defaults to false
if(lora->cad_done != NULL) lora->cad_done(lora, cad_detected);
}
if((irqs & IRQ_FHSS_CHANGE) == IRQ_FHSS_CHANGE) {
ESP_LOGI(TAG, "switching channel %d: %d", lora->channel, lora->channels[lora->channel]);
if(lora->channel == 0 && lora->channels[lora->channel] == 0) continue;
if(lora->channels[lora->channel] == 0) {
ESP_LOGI(TAG, "reseting to channel 0");
lora->channel = 0;
}
lora32_set_frequency(lora, lora->frequency + (lora->channels[lora->channel] * bandwidths[lora->bandwidth]));
lora->channel++;
}
}
}
@ -419,7 +446,7 @@ void lora32_read_data(lora32_cfg_t *lora, uint8_t *data) {
}
}
static void IRAM_ATTR lora32_on_dio0(void *arg) {
static void IRAM_ATTR lora32_on_dio(void *arg) {
xQueueSendFromISR(dio_event_queue, (void*)&arg, pdFALSE);
}
@ -524,14 +551,18 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
if(lora->receive != NULL) {
ESP_LOGI(TAG, "Setting GPIO Interrupt");
// TODO check at least one DIOx pin is not NULL
io_conf.intr_type = GPIO_PIN_INTR_POSEDGE;
io_conf.pin_bit_mask = (1ULL << lora->dio0);
io_conf.pin_bit_mask = ((1ULL << lora->dio0) | (1ULL << lora->dio1) | (1ULL << lora->dio2));
io_conf.mode = GPIO_MODE_INPUT;
io_conf.pull_down_en = 0;
io_conf.pull_up_en = 0;
gpio_config(&io_conf);
gpio_set_intr_type(lora->dio0, GPIO_INTR_POSEDGE);
gpio_set_intr_type(lora->dio1, GPIO_INTR_POSEDGE);
gpio_set_intr_type(lora->dio2, GPIO_INTR_POSEDGE);
// the DIO interrupt handling for every device is done from one task
if(dio_task_handle == NULL) {
@ -548,7 +579,14 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
// add ISR handler to the global service started (once) above
ESP_LOGI(TAG, "Installing ISR handler for GPIO%d", lora->dio0);
gpio_isr_handler_add(lora->dio0, lora32_on_dio0, lora);
if(lora->dio0 > -1)
gpio_isr_handler_add(lora->dio0, lora32_on_dio, (void*)lora);
if(lora->dio1 > -1)
gpio_isr_handler_add(lora->dio1, lora32_on_dio, (void*)lora);
if(lora->dio2 > -1)
gpio_isr_handler_add(lora->dio2, lora32_on_dio, (void*)lora);
}
return 1;