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No commits in common. "c8beb458f61eeab890579f2fd07df56042a881f6" and "04768f460ac18950e8c98d6c22bf9a95c79f4a1b" have entirely different histories.

3 changed files with 136 additions and 132 deletions

47
Kconfig Normal file
View file

@ -0,0 +1,47 @@
menuconfig LORA32_ENABLED
bool "LORA32"
default y
help
Select this option to enable LORA32 driver and show the submodule with configuration
config LORA32_NSS_PIN
int "GPIO to handle NSS"
depends on LORA32_ENABLED
default 18
help
GPIO to handle NSS
config LORA32_RESET_PIN
int "GPIO to handle RESET"
depends on LORA32_ENABLED
default 14
help
GPIO to handle RESET
config LORA32_DIO0_PIN
int "GPIO to handle DIO0"
depends on LORA32_ENABLED
default 26
help
GPIO to handle DIO0
config LORA32_MISO_PIN
int "GPIO to handle MISO"
depends on LORA32_ENABLED
default 19
help
GPIO to handle MISO
config LORA32_MOSI_PIN
int "GPIO to handle MOSI"
depends on LORA32_ENABLED
default 27
help
GPIO to handle MOSI
config LORA32_CLK_PIN
int "GPIO to handle CLK"
depends on LORA32_ENABLED
default 5
help
GPIO to handle CLK

View file

@ -77,8 +77,6 @@
#define EV_DIO0 (1 << 0)
#define ERR_LOR_VERSION_MISMATCH (01)
enum freq {
F433, F866, F915
} lora32_freq;
@ -90,12 +88,10 @@ typedef enum {
const long long frequencies[3];
const long bandwidths[10];
typedef struct lora32_cfg_t lora32_cfg_t;
typedef void (*receiveCallback)(lora32_cfg_t *lora, uint8_t size);
typedef void (*txdoneCallback)(lora32_cfg_t *lora);
typedef void (*cadDoneCallback)(lora32_cfg_t *lora, bool detected);
typedef void (*cadDetectedCallback)(lora32_cfg_t *lora);
typedef void (*receiveCallback)(uint8_t size);
typedef void (*txdoneCallback)();
typedef void (*cadDoneCallback)(bool detected);
typedef void (*cadDetectedCallback)();
typedef struct {
EventGroupHandle_t events;
@ -103,9 +99,6 @@ typedef struct {
typedef struct lora32_cfg_t {
uint8_t nss;
uint8_t cipo;
uint8_t copi;
uint8_t clk;
uint8_t dio0;
uint8_t reset;
uint8_t fifoIdx;
@ -125,28 +118,23 @@ typedef struct lora32_cfg_t {
cadDoneCallback cad_done;
cadDetectedCallback cad_detected;
uint8_t spi_host;
spi_device_handle_t spi;
lora32_handle_t handle;
} lora32_cfg_t;
uint8_t lora32_spi_init(lora32_cfg_t *config);
lora32_cfg_t lora32_create();
uint8_t lora32_init(lora32_cfg_t *config);
uint8_t lora32_data_available(lora32_cfg_t *lora);
double lora32_calc_datarate(lora32_cfg_t *lora);
void lora32_dump_regs(lora32_cfg_t *lora);
void lora32_enable_continuous_rx(lora32_cfg_t *lora);
void lora32_enable_single_rx(lora32_cfg_t *lora);
void lora32_enable_cad(lora32_cfg_t *lora);
void lora32_toggle_reset(lora32_cfg_t *lora);
void lora32_send(lora32_cfg_t *config, uint8_t *data, uint8_t len);
void lora32_set_bandwidth(lora32_cfg_t *lora, uint8_t bw);
void lora32_set_coding_rate(lora32_cfg_t *lora, uint8_t cr);
void lora32_set_spreadfactor(lora32_cfg_t *lora, uint8_t factor);
void lora32_read_data(lora32_cfg_t *lora, uint8_t *data);
void lora32_sleep(lora32_cfg_t *lora);
void lora32_standby(lora32_cfg_t *lora);
#endif // _LORA32_H__

View file

@ -2,7 +2,6 @@
#include <math.h>
#include "freertos/FreeRTOS.h"
#include "freertos/semphr.h"
#include "freertos/task.h"
#include "freertos/queue.h"
@ -11,13 +10,16 @@
#include "driver/gpio.h"
#include "driver/spi_common.h"
#include "driver/spi_master.h"
#include "driver/spi_common_internal.h"
#include "esp32-lora.h"
#define READ_REG 0x7F
#define WRITE_REG 0x80
#define PIN_NUM_MISO CONFIG_LORA32_MISO_PIN
#define PIN_NUM_MOSI CONFIG_LORA32_MOSI_PIN
#define PIN_NUM_CLK CONFIG_LORA32_CLK_PIN
#define PA_OUTPUT_RFO_PIN 0
#define PA_OUTPUT_PA_BOOST_PIN 1
@ -26,13 +28,45 @@ const long bandwidths[] = { 7.8e3, 10.4e3, 15.6e3, 20.8e3, 31.25e3, 41.7e3, 62.5
const char *TAG = "LoRa32";
static QueueHandle_t dio_event_queue;
static TaskHandle_t dio_task_handle;
static SemaphoreHandle_t spi_semaphore;
lora32_cfg_t lora32_create() {
static spi_device_handle_t spi;
return (lora32_cfg_t){
.bandwidth = B125,
.codingRate = DEFAULT_CR,
.dio0 = CONFIG_LORA32_DIO0_PIN,
.implicitHeader = false,
.nss = CONFIG_LORA32_NSS_PIN,
.reset = CONFIG_LORA32_RESET_PIN,
.frequency = 915000000,
.preamble = DEFAULT_PREAMBLE,
.spreadingFactor = DEFAULT_SF,
.spi = spi,
.receive = NULL,
.useCRC = false,
.fifoIdx = 0
};
}
void lora32_send_cmd(lora32_cfg_t lora, uint8_t cmd, uint8_t value, uint8_t len, uint8_t *rx_buffer) {
uint8_t tx_buffer[2];
tx_buffer[0] = cmd;
tx_buffer[1] = value;
spi_transaction_t t;
memset(&t, 0, sizeof(t));
t.length = 8 * len;
t.rxlength = 8 * len;
t.tx_buffer = &tx_buffer;
t.rx_buffer = rx_buffer;
ESP_ERROR_CHECK(spi_device_transmit(lora.spi, &t));
//ESP_LOGI(TAG, "send_cmd rx_data: 0x%2X 0x%2X", rx_buffer[0], rx_buffer[1]);
}
uint8_t lora32_read_reg(lora32_cfg_t *lora, uint8_t address) {
xSemaphoreTake(spi_semaphore, portMAX_DELAY);
spi_transaction_t t;
memset(&t, 0, sizeof(spi_transaction_t));
@ -45,14 +79,10 @@ uint8_t lora32_read_reg(lora32_cfg_t *lora, uint8_t address) {
ESP_LOGV(TAG, "<%2X<%2X", address, t.rx_data[1]);
xSemaphoreGive(spi_semaphore);
return t.rx_data[1];
}
void lora32_write_reg(lora32_cfg_t *lora, uint8_t address, uint8_t value) {
xSemaphoreTake(spi_semaphore, portMAX_DELAY);
spi_device_handle_t spi = lora->spi;
spi_transaction_t t;
@ -66,8 +96,6 @@ void lora32_write_reg(lora32_cfg_t *lora, uint8_t address, uint8_t value) {
t.tx_data[1] = value;
ESP_ERROR_CHECK(spi_device_transmit(spi, &t));
xSemaphoreGive(spi_semaphore);
};
double lora32_calc_datarate(lora32_cfg_t *lora) {
@ -80,35 +108,31 @@ double lora32_calc_datarate(lora32_cfg_t *lora) {
}
void lora23_set_explicit_header(lora32_cfg_t *lora) {
ESP_LOGD(TAG, "setting explicit header");
lora->implicitHeader = false;
lora32_write_reg(lora, REG_MODEM_CONFIG_1, lora32_read_reg(lora, REG_MODEM_CONFIG_1) & 0xFE);
}
void lora23_set_implicit_header(lora32_cfg_t *lora) {
ESP_LOGD(TAG, "setting implicit header");
lora->implicitHeader = true;
lora32_write_reg(lora, REG_MODEM_CONFIG_1, lora32_read_reg(lora, REG_MODEM_CONFIG_1) | 0x01);
}
void lora32_standby(lora32_cfg_t *lora) {
ESP_LOGV(TAG, "MODE_STANDBY");
void lora32_idle(lora32_cfg_t *lora) {
ESP_LOGD(TAG, "MODE_STANDBY");
lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_STANDBY);
}
void lora32_sleep(lora32_cfg_t *lora) {
ESP_LOGV(TAG, "MODE_SLEEP");
ESP_LOGD(TAG, "MODE_SLEEP");
lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_SLEEP);
}
void lora32_enable_tx(lora32_cfg_t *lora) {
lora32_standby(lora);
lora32_idle(lora);
if(lora->implicitHeader)
lora23_set_implicit_header(lora);
@ -121,8 +145,6 @@ void lora32_enable_tx(lora32_cfg_t *lora) {
}
void lora32_send(lora32_cfg_t *lora, uint8_t *data, uint8_t len) {
ESP_ERROR_CHECK(spi_device_acquire_bus(lora->spi, portMAX_DELAY));
lora32_write_reg(lora, REG_DIO_MAPPING_1, DIO0_MODE_TXDONE);
lora32_enable_tx(lora);
@ -134,8 +156,6 @@ void lora32_send(lora32_cfg_t *lora, uint8_t *data, uint8_t len) {
lora32_write_reg(lora, REG_PAYLOAD_LENGTH, len);
lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_TX);
spi_device_release_bus(lora->spi);
}
void lora32_set_frequency(lora32_cfg_t *lora, long frequency) {
@ -250,18 +270,6 @@ void lora32_set_spreadfactor(lora32_cfg_t *lora, uint8_t factor) {
lora32_write_reg(lora, REG_MODEM_CONFIG_2, (lora32_read_reg(lora, REG_MODEM_CONFIG_2) & 0x0F) | ((factor << 4) & 0xF0));
}
void lora32_enable_single_rx(lora32_cfg_t *lora) {
ESP_LOGD(TAG, "MODE_RX_SINGLE");
if(lora->receive != NULL) {
lora32_write_reg(lora, REG_DIO_MAPPING_1, DIO0_MODE_RXDONE);
}
lora32_standby(lora);
lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_RX_SINGLE);
}
void lora32_enable_continuous_rx(lora32_cfg_t *lora) {
ESP_LOGD(TAG, "MODE_RX_CONTINUOUS");
@ -269,8 +277,6 @@ void lora32_enable_continuous_rx(lora32_cfg_t *lora) {
lora32_write_reg(lora, REG_DIO_MAPPING_1, DIO0_MODE_RXDONE);
}
lora32_standby(lora);
lora32_write_reg(lora, REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_RX_CONTINUOUS);
}
@ -354,40 +360,35 @@ static void lora32_handle_receive(lora32_cfg_t *lora) {
lora32_write_reg(lora, REG_FIFO_ADDR_PTR, fifo_addr);
lora->receive(lora, len);
lora->receive(len);
}
static void IRAM_ATTR lora32_dio_task(void *arg) {
// allocate lora32_cfg_t to receive config from Queu
lora32_cfg_t *lora = malloc(sizeof(lora32_cfg_t));
ESP_LOGI(TAG, "starting DIO handler task");
static void IRAM_ATTR lora32_dio0_task(void *arg) {
lora32_cfg_t *lora = (lora32_cfg_t*)arg;
ESP_LOGD(TAG, "starting DIO0 handler task");
while(1) {
// wait for event over Queue
if(xQueueReceive(dio_event_queue, (void*)lora, portMAX_DELAY) != pdPASS) continue;
EventBits_t evbits = xEventGroupWaitBits(lora->handle.events, EV_DIO0, pdTRUE, pdFALSE, 5000 / portTICK_PERIOD_MS);
// need a better way to log which event and from which config
//ESP_LOGI(TAG, "handling DIO0 on GPIO%d", lora->dio0);
// timed out, loop and continue to wait
if(evbits == 0) continue;
spi_device_acquire_bus(lora->spi, portMAX_DELAY);
ESP_LOGD(TAG, "handling DIO0");
// read IRQ flags
uint8_t irqs = lora32_read_reg(lora, REG_IRQ_FLAGS);
ESP_LOGD(TAG, "reading irqs: %02X", irqs);
// clear IRQ flags by writing mask back
// clear IRQ flags
ESP_LOGD(TAG, "clearing irqs");
lora32_write_reg(lora, REG_IRQ_FLAGS, irqs);
spi_device_release_bus(lora->spi);
// TODO handle header validation
if((irqs & IRQ_RX_DONE) == IRQ_RX_DONE) {
lora32_handle_receive(lora);
}
if((irqs & IRQ_TX_DONE) == IRQ_TX_DONE) {
if(lora->tx_done != NULL) lora->tx_done(lora);
if(lora->tx_done != NULL) lora->tx_done();
}
bool cad_detected = false;
@ -397,13 +398,13 @@ static void IRAM_ATTR lora32_dio_task(void *arg) {
cad_detected = true;
// no need for arg, cad_detected callback is always presummed true
if(lora->cad_detected != NULL) lora->cad_detected(lora);
if(lora->cad_detected != NULL) lora->cad_detected();
}
if((irqs & IRQ_CAD_DONE) == IRQ_CAD_DONE) {
// cad_done gets true/false from above, when activity is detected
// these *should* fire at the same time, defaults to false
if(lora->cad_done != NULL) lora->cad_done(lora, cad_detected);
if(lora->cad_done != NULL) lora->cad_done(cad_detected);
}
}
}
@ -420,35 +421,12 @@ void lora32_read_data(lora32_cfg_t *lora, uint8_t *data) {
}
static void IRAM_ATTR lora32_on_dio0(void *arg) {
xQueueSend(dio_event_queue, arg, (TickType_t)0);
}
BaseType_t woken = pdFALSE;
uint8_t lora32_spi_init(lora32_cfg_t *lora) {
ESP_LOGI(TAG, "Initializing SPI bus");
esp_err_t err = ESP_OK;
spi_bus_config_t buscfg = {
.miso_io_num = lora->cipo,
.mosi_io_num = lora->copi,
.sclk_io_num = lora->clk,
.quadwp_io_num = -1,
.quadhd_io_num = -1
};
if(spi_bus_get_attr(lora->spi_host) == NULL) {
// 2 should be SPI_DMA_CH_AUTO ??? but it doesn't seem to be defined
err = spi_bus_initialize(lora->spi_host, &buscfg, 2);
}
return err;
xEventGroupSetBitsFromISR(((lora32_cfg_t*)arg)->handle.events, EV_DIO0, &woken);
}
uint8_t lora32_init(lora32_cfg_t *lora) {
if(spi_semaphore == NULL) {
spi_semaphore = xSemaphoreCreateMutex();
}
gpio_config_t io_conf;
io_conf.intr_type = GPIO_PIN_INTR_DISABLE;
io_conf.mode = GPIO_MODE_OUTPUT;
@ -465,7 +443,19 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
vTaskDelay(10 / portTICK_PERIOD_MS);
// SPI device setup
// init spi
ESP_LOGI(TAG, "Initializing SPI bus");
// TODO fix this awkward log along with pin assignments in general
ESP_LOGI(TAG, "\n MISO: %d\nMOSI: %d\nCLK: %d\nNSS: %d", PIN_NUM_MISO, PIN_NUM_MOSI, PIN_NUM_CLK, lora->nss);
spi_bus_config_t buscfg = {
.miso_io_num = PIN_NUM_MISO,
.mosi_io_num = PIN_NUM_MOSI,
.sclk_io_num = PIN_NUM_CLK,
.quadwp_io_num = -1,
.quadhd_io_num = -1
};
spi_device_interface_config_t devcfg = {
.clock_speed_hz = 8E6,
.flags = 0,
@ -474,20 +464,15 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
.queue_size = 7,
};
ESP_ERROR_CHECK(spi_bus_add_device(lora->spi_host, &devcfg, &lora->spi));
ESP_ERROR_CHECK(spi_bus_initialize(HSPI_HOST, &buscfg, 0));
ESP_ERROR_CHECK(spi_bus_add_device(HSPI_HOST, &devcfg, &lora->spi));
// initialize event groups
lora->handle.events = xEventGroupCreate();
uint8_t version = lora32_read_reg(lora, REG_VERSION);
ESP_LOGD(TAG, "lora32_get_id() == 0x%2X", version);
// if ID does not match, something is likely wrong on the SPI bus
if(version != 0x12) {
ESP_LOGD(TAG, "REG_VERSION returned incorrectly. Expected 0x12 got 0x%02X", version);
return ERR_LOR_VERSION_MISMATCH;
}
assert(version == 0x12);
// TODO: confirm this is happening. Before/after power measurements?
lora32_sleep(lora);
@ -512,43 +497,27 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
lora32_set_tx_power(lora, 17, PA_OUTPUT_PA_BOOST_PIN);
ESP_LOGI(TAG, "lora32_set_tx_power");
lora32_standby(lora);
ESP_LOGI(TAG, "lora32_standby");
if(lora->implicitHeader)
lora23_set_implicit_header(lora);
else
lora23_set_explicit_header(lora);
lora32_idle(lora);
ESP_LOGI(TAG, "lora32_idle");
// TODO setup shouldn't be based on just receive callback
if(lora->receive != NULL) {
ESP_LOGI(TAG, "Setting GPIO Interrupt");
ESP_LOGI(TAG, "Setting callback handler");
io_conf.intr_type = GPIO_PIN_INTR_POSEDGE;
io_conf.pin_bit_mask = (1ULL << lora->dio0);
io_conf.pin_bit_mask = (1ULL << CONFIG_LORA32_DIO0_PIN);
io_conf.mode = GPIO_MODE_INPUT;
io_conf.pull_down_en = 0;
io_conf.pull_up_en = 0;
gpio_config(&io_conf);
gpio_set_intr_type(lora->dio0, GPIO_INTR_POSEDGE);
gpio_set_intr_type(CONFIG_LORA32_DIO0_PIN, GPIO_INTR_POSEDGE);
gpio_install_isr_service(0);
// the DIO interrupt handling for every device is done from one task
if(dio_task_handle == NULL) {
ESP_LOGI(TAG, "Setting callback handler and ISR service");
gpio_isr_handler_add(CONFIG_LORA32_DIO0_PIN, lora32_on_dio0, (void*)lora);
// enable global ISR service
gpio_install_isr_service(0);
dio_event_queue = xQueueCreate(10, sizeof(lora32_cfg_t));
// this should probably be high priority
xTaskCreate(&lora32_dio_task, "lora32_dio_task", 4096, NULL, 6, &dio_task_handle);
}
// add ISR handler to the global service started (once) above
ESP_LOGI(TAG, "Installing ISR handler for GPIO%d", lora->dio0);
gpio_isr_handler_add(lora->dio0, lora32_on_dio0, lora);
// this should probably be high priority
xTaskCreate(&lora32_dio0_task, "lora32_dio0_task", 14048, (void*)lora, 6, NULL);
}
return 1;