morgan/esp32-lora
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base: morgan:e8b52e7c78326245e3da5367c3b739145888f13e
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morgan:development
morgan:refactor
morgan:fhss
morgan:multidev-wip
morgan:dekconfig
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compare: morgan:97204f089b8fd234068a426b751aebb79a3ea0f5
Branches Tags
morgan:refactor
morgan:development
morgan:fhss
morgan:multidev-wip
morgan:dekconfig

3 commits
e8b52e7c78 ... 97204f089b

Author SHA1 Message Date
Morgan 'ARR\!' Allen
97204f089b cleanup of IRQ pin setting 2023-09-06 16:45:20 -07:00
Morgan 'ARR\!' Allen
9d1bd57a2e move all LOGI to more severe log levels 2023-01-16 22:58:40 -08:00
Morgan 'ARR\!' Allen
41065d791e change lora32_cfg_t pin types to int8_t and default to -1 2022-05-02 15:13:53 -07:00
2 changed files with 58 additions and 43 deletions
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19
include/esp32-lora.h
View file

@ -89,6 +89,15 @@
.implicitHeader = false,\
.useCRC = false,\
.fifoIdx = 0,\
.copi = -1,\
.cipo = -1,\
.clk = -1,\
.dio0 = -1,\
.dio1 = -1,\
.dio2 = -1,\
.nss = -1,\
.reset = -1,\
.spi_host = 1,\
}
enum freq {
@ -114,17 +123,17 @@ typedef struct {
} lora32_handle_t;
typedef struct lora32_cfg_t {
uint8_t nss;
uint8_t cipo;
uint8_t copi;
uint8_t clk;
uint8_t reset;
uint8_t fifoIdx;
uint8_t channel;
uint8_t bandwidth;
uint8_t spreadingFactor;
uint8_t codingRate;
int8_t nss;
int8_t cipo;
int8_t copi;
int8_t clk;
int8_t reset;
int8_t dio0;
int8_t dio1;
int8_t dio2;

82
main/esp32-lora.c
View file

@ -74,7 +74,7 @@ double lora32_calc_datarate(lora32_cfg_t *lora) {
double cr = (4.0 / (long)lora->codingRate);
double sf = pow(2, lora->spreadingFactor);
double c2 = sf / bandwidths[lora->bandwidth];
ESP_LOGI(TAG, "codingRate: %d cr: %f sf: %f c2: %f", lora->codingRate, cr, sf, c2);
ESP_LOGD(TAG, "codingRate: %d cr: %f sf: %f c2: %f", lora->codingRate, cr, sf, c2);
return lora->spreadingFactor * cr / c2 * 1000;
}
@ -151,12 +151,12 @@ void lora32_send(lora32_cfg_t *lora, uint8_t *data, uint8_t len) {
}
void lora32_set_frequency(lora32_cfg_t *lora, long frequency) {
ESP_LOGI(TAG, "lora32_set_frequency: %lu", frequency);
ESP_LOGD(TAG, "lora32_set_frequency: %lu", frequency);
uint64_t frf = ((uint64_t)frequency << 19) / 32000000;
ESP_LOGI(TAG, "REG_FRF_MSB: 0x%2X", (uint8_t)(frf >> 16));
ESP_LOGI(TAG, "REG_FRF_MID: 0x%2X", (uint8_t)(frf >> 8));
ESP_LOGI(TAG, "REG_FRF_LSB: 0x%2X", (uint8_t)(frf >> 0));
ESP_LOGD(TAG, "REG_FRF_MSB: 0x%2X", (uint8_t)(frf >> 16));
ESP_LOGD(TAG, "REG_FRF_MID: 0x%2X", (uint8_t)(frf >> 8));
ESP_LOGD(TAG, "REG_FRF_LSB: 0x%2X", (uint8_t)(frf >> 0));
lora32_write_reg(lora, REG_FRF_MSB, (uint8_t)(frf >> 16));
lora32_write_reg(lora, REG_FRF_MID, (uint8_t)(frf >> 8));
@ -194,7 +194,7 @@ void lora32_set_tx_power(lora32_cfg_t *lora, uint8_t level, uint8_t output) {
lora32_write_reg(lora, REG_PA_CONFIG, PA_BOOST | (level - 2));
}
ESP_LOGI(TAG, "set_tx_power(%d, %d)", level, output);
ESP_LOGD(TAG, "set_tx_power(%d, %d)", level, output);
ESP_LOGD(TAG, "REG_PA_CONFIG: 0x%2X", lora32_read_reg(lora, REG_PA_CONFIG));
}
@ -231,7 +231,7 @@ void lora32_dump_regs(lora32_cfg_t *lora) {
void lora32_toggle_reset(lora32_cfg_t *config) {
// toggle reset (L/H)
ESP_LOGI(TAG, "Toggling reset pin %d", config->reset);
ESP_LOGD(TAG, "Toggling reset pin %d", config->reset);
gpio_set_level(config->reset, 0);
vTaskDelay(100 / portTICK_PERIOD_MS); // requires 100us
@ -257,7 +257,7 @@ void lora32_set_spreadfactor(lora32_cfg_t *lora, uint8_t factor) {
lora32_write_reg(lora, REG_DETECTION_THRESHOLD, DETECT_THRES_OTHER);
}
ESP_LOGI(TAG, "lora32_set_spreadfactor: %d", factor);
ESP_LOGV(TAG, "lora32_set_spreadfactor: %d", factor);
lora32_write_reg(lora, REG_MODEM_CONFIG_2, (lora32_read_reg(lora, REG_MODEM_CONFIG_2) & 0x0F) | ((factor << 4) & 0xF0));
@ -312,11 +312,11 @@ int16_t lora32_get_packet_rssi(lora32_cfg_t *lora) {
long lora32_get_bandwidth(lora32_cfg_t *lora) {
uint8_t bw = (lora32_read_reg(lora, REG_MODEM_CONFIG_1) >> 4);
ESP_LOGI(TAG, "lora32_get_bandwidth: %d", bw);
ESP_LOGV(TAG, "lora32_get_bandwidth: %d", bw);
if(bw > 9) return -1;
ESP_LOGI(TAG, "lora32_get_bandwidth: %ld", bandwidths[bw]);
ESP_LOGD(TAG, "lora32_get_bandwidth: %ld", bandwidths[bw]);
return bandwidths[bw];
}
@ -324,20 +324,20 @@ long lora32_get_bandwidth(lora32_cfg_t *lora) {
void lora32_set_ldo_flag(lora32_cfg_t *lora) {
long symbolDuration = 1000 / (lora32_get_bandwidth(lora) / (1L << lora32_get_spreadfactor(lora)));
ESP_LOGI(TAG, "symbolDuration: %ld", symbolDuration);
ESP_LOGD(TAG, "symbolDuration: %ld", symbolDuration);
bool ldoOn = symbolDuration > 16;
ESP_LOGI(TAG, "ldoOn: %d", ldoOn);
ESP_LOGD(TAG, "ldoOn: %d", ldoOn);
uint8_t modem_config_3 = lora32_read_reg(lora, REG_MODEM_CONFIG_3);
ESP_LOGI(TAG, "modem_config_3: %d", modem_config_3);
ESP_LOGD(TAG, "modem_config_3: %d", modem_config_3);
modem_config_3 |= ldoOn << 3;
ESP_LOGI(TAG, "modem_config_3: %d", modem_config_3);
ESP_LOGD(TAG, "modem_config_3: %d", modem_config_3);
lora32_write_reg(lora, REG_MODEM_CONFIG_3, modem_config_3);
}
void lora32_set_bandwidth(lora32_cfg_t *lora, uint8_t bw) {
ESP_LOGI(TAG, "lora32_set_bandwidth: %d", bw);
ESP_LOGD(TAG, "lora32_set_bandwidth: %d", bw);
uint8_t modem_config_1 = lora32_read_reg(lora, REG_MODEM_CONFIG_1);
lora32_write_reg(lora, REG_MODEM_CONFIG_1, (modem_config_1 & 0x0F) | (bw << 4));
@ -351,7 +351,7 @@ void lora32_set_coding_rate(lora32_cfg_t *lora, uint8_t cr) {
cr = cr - 4;
ESP_LOGI(TAG, "lora32_set_coding_rate: %d", cr + 4);
ESP_LOGD(TAG, "lora32_set_coding_rate: %d", cr + 4);
lora32_write_reg(lora, REG_MODEM_CONFIG_1, (lora32_read_reg(lora, REG_MODEM_CONFIG_1) & 0xF1) | (cr << 1));
}
@ -365,7 +365,7 @@ void lora32_set_lna(lora32_cfg_t *lora, uint8_t gain) {
uint8_t lna = lora32_read_reg(lora, REG_LNA);
lora32_write_reg(lora, REG_LNA, lna | gain);
ESP_LOGI(TAG, "set lna: 0x%2X", lna | gain);
ESP_LOGD(TAG, "set lna: 0x%2X", lna | gain);
}
static void lora32_handle_receive(lora32_cfg_t *lora) {
@ -384,7 +384,7 @@ static void lora32_handle_receive(lora32_cfg_t *lora) {
static void IRAM_ATTR lora32_dio_task(void *arg) {
// allocate lora32_cfg_t to receive config from Queu
lora32_cfg_t *lora = malloc(sizeof(lora32_cfg_t));
ESP_LOGI(TAG, "starting DIO handler task");
ESP_LOGD(TAG, "starting DIO handler task");
while(1) {
// wait for event over Queue
@ -431,12 +431,12 @@ static void IRAM_ATTR lora32_dio_task(void *arg) {
}
if((irqs & IRQ_FHSS_CHANGE) == IRQ_FHSS_CHANGE) {
ESP_LOGI(TAG, "switching channel %d: %d", lora->channel, lora->channels[lora->channel]);
ESP_LOGD(TAG, "switching channel %d: %d", lora->channel, lora->channels[lora->channel]);
if(lora->channel == 0 && lora->channels[lora->channel] == 0) continue;
if(lora->channels[lora->channel] == 0) {
ESP_LOGI(TAG, "reseting to channel 0");
ESP_LOGD(TAG, "reseting to channel 0");
lora->channel = 0;
}
@ -451,7 +451,7 @@ void lora32_read_data(lora32_cfg_t *lora, uint8_t *data) {
uint8_t i = 0;
uint8_t len = lora32_read_reg(lora, (lora->implicitHeader ? REG_PAYLOAD_LENGTH : REG_RX_NB_BYTES));
ESP_LOGI(TAG, "Reading %d bytes", len);
ESP_LOGD(TAG, "Reading %d bytes", len);
for(i = 0; i < len; i++) {
data[i] = lora32_read_reg(lora, REG_FIFO);
@ -463,7 +463,7 @@ static void IRAM_ATTR lora32_on_dio(void *arg) {
}
uint8_t lora32_spi_init(lora32_cfg_t *lora) {
ESP_LOGI(TAG, "Initializing SPI bus");
ESP_LOGD(TAG, "Initializing SPI bus");
esp_err_t err = ESP_OK;
@ -499,7 +499,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
lora32_toggle_reset(lora);
// set NSS high
ESP_LOGI(TAG, "Bringing NSS high: %d", lora->nss);
ESP_LOGD(TAG, "Bringing NSS high: %d", lora->nss);
gpio_set_level(lora->nss, 1);
vTaskDelay(10 / portTICK_PERIOD_MS);
@ -521,16 +521,18 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
uint8_t version = lora32_read_reg(lora, REG_VERSION);
ESP_LOGD(TAG, "lora32_get_id() == 0x%2X", version);
lora->version = version;
// if ID does not match, something is likely wrong on the SPI bus
if(version != 0x12) {
ESP_LOGD(TAG, "REG_VERSION returned incorrectly. Expected 0x12 got 0x%02X", version);
ESP_LOGE(TAG, "REG_VERSION returned incorrectly. Expected 0x12 got 0x%02X", version);
return ERR_LOR_VERSION_MISMATCH;
}
// TODO: confirm this is happening. Before/after power measurements?
lora32_sleep(lora);
ESP_LOGI(TAG, "lora32_sleep");
ESP_LOGV(TAG, "lora32_sleep");
// TODO: VERIFY
lora32_set_frequency(lora, lora->frequency);
@ -540,7 +542,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
lora32_write_reg(lora, REG_FIFO_TX_BASE_ADDR, 0x00);
lora32_write_reg(lora, REG_FIFO_RX_BASE_ADDR, 0x00);
ESP_LOGI(TAG, "clear rx/tx fifos");
ESP_LOGV(TAG, "clear rx/tx fifos");
lora32_set_lna(lora, 0x03);
@ -549,10 +551,10 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
// TODO make based on config
lora32_set_tx_power(lora, 17, PA_OUTPUT_PA_BOOST_PIN);
ESP_LOGI(TAG, "lora32_set_tx_power");
ESP_LOGV(TAG, "lora32_set_tx_power");
lora32_standby(lora);
ESP_LOGI(TAG, "lora32_standby");
ESP_LOGV(TAG, "lora32_standby");
if(lora->implicitHeader)
lora23_set_implicit_header(lora);
@ -561,24 +563,28 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
// TODO setup shouldn't be based on just receive callback
if(lora->receive != NULL) {
ESP_LOGI(TAG, "Setting GPIO Interrupt");
ESP_LOGV(TAG, "Setting GPIO Interrupt");
// TODO check at least one DIOx pin is not NULL
uint64_t pin_bit_mask = 0;
if(lora->dio0 > -1)
pin_bit_mask |= (1 << lora->dio0);
if(lora->dio1 > -1)
pin_bit_mask |= (1 << lora->dio1);
if(lora->dio2 > -1)
pin_bit_mask |= (1 << lora->dio2);
io_conf.intr_type = GPIO_PIN_INTR_POSEDGE;
io_conf.pin_bit_mask = ((1ULL << lora->dio0) | (1ULL << lora->dio1) | (1ULL << lora->dio2));
io_conf.pin_bit_mask = pin_bit_mask;
io_conf.mode = GPIO_MODE_INPUT;
io_conf.pull_down_en = 0;
io_conf.pull_down_en = 1;
io_conf.pull_up_en = 0;
gpio_config(&io_conf);
gpio_set_intr_type(lora->dio0, GPIO_INTR_POSEDGE);
gpio_set_intr_type(lora->dio1, GPIO_INTR_POSEDGE);
gpio_set_intr_type(lora->dio2, GPIO_INTR_POSEDGE);
// the DIO interrupt handling for every device is done from one task
if(dio_task_handle == NULL) {
ESP_LOGI(TAG, "Setting callback handler and ISR service");
ESP_LOGV(TAG, "Setting callback handler and ISR service");
// enable global ISR service
gpio_install_isr_service(0);
@ -590,7 +596,7 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
}
// add ISR handler to the global service started (once) above
ESP_LOGI(TAG, "Installing ISR handler for GPIO%d", lora->dio0);
ESP_LOGV(TAG, "Installing ISR handler for GPIO%d", lora->dio0);
if(lora->dio0 > -1)
gpio_isr_handler_add(lora->dio0, lora32_on_dio, (void*)lora);
@ -601,5 +607,5 @@ uint8_t lora32_init(lora32_cfg_t *lora) {
gpio_isr_handler_add(lora->dio2, lora32_on_dio, (void*)lora);
}
return 1;
return ESP_OK;
};