what was there before
This commit is contained in:
Morgan 'ARR\!' Allen
commit
dc1e646922
File diff suppressed because it is too large
Load Diff
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@ -0,0 +1,848 @@
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|
||||
(reference "J1") (unit 1) (value "Conn_01x24") (footprint "board:rotary2")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005e212b9c"
|
||||
(reference "J2") (unit 1) (value "Conn_01x24") (footprint "board:rotary2")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005e21fcc1"
|
||||
(reference "J3") (unit 1) (value "Conn_01x01") (footprint "board:PTH_GIGANTE")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005e21ed6a"
|
||||
(reference "J4") (unit 1) (value "Conn_01x01") (footprint "board:PTH_GIGANTE")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005e2381b6"
|
||||
(reference "J5") (unit 1) (value "Conn_01x01") (footprint "board:70-9155")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005e23461d"
|
||||
(reference "J6") (unit 1) (value "Conn_01x03") (footprint "Connector_PinSocket_2.54mm:PinSocket_1x04_P2.54mm_Horizontal")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005e237aad"
|
||||
(reference "J7") (unit 1) (value "Conn_01x01") (footprint "board:70-9155")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005e240d07"
|
||||
(reference "J8") (unit 1) (value "Conn_01x01") (footprint "board:70-9155")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005e4d50ea"
|
||||
(reference "J9") (unit 1) (value "Conn_01x01") (footprint "board:70-9155")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005e4c3252"
|
||||
(reference "R1") (unit 1) (value "R") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
(path "/00000000-0000-0000-0000-00005e4c3b04"
|
||||
(reference "R2") (unit 1) (value "R") (footprint "Resistor_SMD:R_0603_1608Metric")
|
||||
)
|
||||
)
|
||||
)
|
||||
|
|
@ -0,0 +1,16 @@
|
|||
(module 70-9155 (layer F.Cu) (tedit 5E21E0B8)
|
||||
(fp_text reference REF** (at 0 2.4) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value 70-9155 (at 0 -2.1) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_line (start -6.25 -1.5) (end 6.25 -1.5) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 6.25 -1.5) (end 6.25 1.5) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 6.25 1.5) (end -6.25 1.5) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start -6.25 1.5) (end -6.25 -1.5) (layer F.SilkS) (width 0.12))
|
||||
(fp_line (start 0 -0.25) (end 0 0.25) (layer F.SilkS) (width 0.01))
|
||||
(fp_line (start -0.25 0) (end 0.25 0) (layer F.SilkS) (width 0.01))
|
||||
(pad 1 smd rect (at -5 0) (size 2.4 3) (layers F.Cu F.Paste F.Mask))
|
||||
(pad 1 smd rect (at 5 0) (size 2.4 3) (layers F.Cu F.Paste F.Mask))
|
||||
)
|
||||
|
|
@ -0,0 +1,9 @@
|
|||
(module PTH_GIGANTE (layer F.Cu) (tedit 5E2128DF)
|
||||
(fp_text reference REF** (at 0 9) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value PTH_GIGANTE (at 0 -10.5) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(pad 1 thru_hole circle (at 0 0) (size 20 20) (drill 10) (layers *.Cu *.Mask))
|
||||
)
|
||||
|
|
@ -0,0 +1,208 @@
|
|||
(module rotary (layer F.Cu) (tedit 5E2126B5)
|
||||
(descr "Grou StepUp generated footprint")
|
||||
(attr smd)
|
||||
(fp_text reference FC_ (at 0 1) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value Val_ (at 0 -1) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user %R (at 0 1) (layer F.Fab)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user "EDIT PAD NUMBERS" (at 0 -2) (layer Cmts.User)
|
||||
(effects (font (size 1 1) (thickness 0.2) italic))
|
||||
)
|
||||
(pad 2 smd custom (at 3.229803 -12.053788 345) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 20 smd custom (at -12.053788 -3.229803 75) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 8 smd custom (at 12.053788 3.229803 255) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 14 smd custom (at -3.229803 12.053788 165) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 21 smd custom (at -10.807131 -6.2395 60) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 15 smd custom (at -6.2395 10.807131 150) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 3 smd custom (at 6.2395 -10.807131 330) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 9 smd custom (at 10.807131 6.2395 240) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 22 smd custom (at -8.823985 -8.823985 45) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 16 smd custom (at -8.823985 8.823985 135) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 4 smd custom (at 8.823985 -8.823985 315) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 10 smd custom (at 8.823985 8.823985 225) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 23 smd custom (at -6.2395 -10.807131 30) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 17 smd custom (at -10.807131 6.2395 120) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 5 smd custom (at 10.807131 -6.2395 300) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 11 smd custom (at 6.2395 10.807131 210) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 18 smd custom (at -12.053788 3.229803 105) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 12 smd custom (at 3.229803 12.053788 195) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 24 smd custom (at -3.229803 -12.053788 15) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 6 smd custom (at 12.053788 -3.229803 285) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 19 smd custom (at -12.479 0 90) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 7 smd custom (at 12.479 0 270) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 13 smd custom (at 0 12.479 180) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
(pad 1 smd custom (at 0 -12.479) (size 0.5 0.5) (layers F.Cu F.Paste F.Mask)
|
||||
(zone_connect 0)
|
||||
(options (clearance outline) (anchor circle))
|
||||
(primitives
|
||||
(gr_poly (pts
|
||||
(xy 0.333677 0.48377) (xy -0.333677 0.48377) (xy -1 0.52087) (xy -1.083333 -0.475652) (xy -0.542138 -0.50956)
|
||||
(xy 0 -0.52087) (xy 0.542138 -0.50956) (xy 1.083333 -0.475652) (xy 1 0.52087)) (width 0))
|
||||
))
|
||||
)
|
||||
|
|
@ -0,0 +1,192 @@
|
|||
(module footprint (layer F.Cu) (tedit 5A74E519)
|
||||
(attr smd)
|
||||
(descr "footprint StepUp generated footprint")
|
||||
(fp_text reference "FC_" (at 0.0 1.0) (layer F.SilkS)
|
||||
(effects (font (size 1.0 1.0) (thickness 0.15)))
|
||||
)
|
||||
(fp_text value "Val_" (at 0.0 -1.0) (layer F.SilkS)
|
||||
(effects (font (size 1.0 1.0) (thickness 0.15)))
|
||||
)
|
||||
(fp_text user %R (at 0.0 1.0) (layer F.Fab)
|
||||
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|
@ -0,0 +1,9 @@
|
|||
(module "slot test" (layer F.Cu) (tedit 5E21E1FD)
|
||||
(fp_text reference REF** (at 0 2.25) (layer F.SilkS)
|
||||
(effects (font (size 1 1) (thickness 0.15)))
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)
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(fp_text value "slot test" (at 0 -2) (layer F.Fab)
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)
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|
|
@ -0,0 +1,251 @@
|
|||
update=Sun 09 Feb 2020 10:28:10 AM PST
|
||||
version=1
|
||||
last_client=kicad
|
||||
[general]
|
||||
version=1
|
||||
RootSch=
|
||||
BoardNm=
|
||||
[cvpcb]
|
||||
version=1
|
||||
NetIExt=net
|
||||
[eeschema]
|
||||
version=1
|
||||
LibDir=
|
||||
[eeschema/libraries]
|
||||
[pcbnew]
|
||||
version=1
|
||||
PageLayoutDescrFile=
|
||||
LastNetListRead=
|
||||
CopperLayerCount=2
|
||||
BoardThickness=1.6
|
||||
AllowMicroVias=0
|
||||
AllowBlindVias=0
|
||||
RequireCourtyardDefinitions=0
|
||||
ProhibitOverlappingCourtyards=1
|
||||
MinTrackWidth=0.09999999999999999
|
||||
MinViaDiameter=0.4
|
||||
MinViaDrill=0.3
|
||||
MinMicroViaDiameter=0.2
|
||||
MinMicroViaDrill=0.09999999999999999
|
||||
MinHoleToHole=0.25
|
||||
TrackWidth1=0.25
|
||||
TrackWidth2=0.1
|
||||
TrackWidth3=0.2
|
||||
ViaDiameter1=0.8
|
||||
ViaDrill1=0.4
|
||||
dPairWidth1=0.2
|
||||
dPairGap1=0.25
|
||||
dPairViaGap1=0.25
|
||||
SilkLineWidth=0.12
|
||||
SilkTextSizeV=1
|
||||
SilkTextSizeH=1
|
||||
SilkTextSizeThickness=0.15
|
||||
SilkTextItalic=0
|
||||
SilkTextUpright=1
|
||||
CopperLineWidth=0.2
|
||||
CopperTextSizeV=1.5
|
||||
CopperTextSizeH=1.5
|
||||
CopperTextThickness=0.3
|
||||
CopperTextItalic=0
|
||||
CopperTextUpright=1
|
||||
EdgeCutLineWidth=0.09999999999999999
|
||||
CourtyardLineWidth=0.05
|
||||
OthersLineWidth=0.15
|
||||
OthersTextSizeV=1
|
||||
OthersTextSizeH=1
|
||||
OthersTextSizeThickness=0.15
|
||||
OthersTextItalic=0
|
||||
OthersTextUpright=1
|
||||
SolderMaskClearance=0.051
|
||||
SolderMaskMinWidth=0.25
|
||||
SolderPasteClearance=0
|
||||
SolderPasteRatio=-0
|
||||
[pcbnew/Layer.F.Cu]
|
||||
Name=F.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.In1.Cu]
|
||||
Name=In1.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In2.Cu]
|
||||
Name=In2.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In3.Cu]
|
||||
Name=In3.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In4.Cu]
|
||||
Name=In4.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In5.Cu]
|
||||
Name=In5.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In6.Cu]
|
||||
Name=In6.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In7.Cu]
|
||||
Name=In7.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In8.Cu]
|
||||
Name=In8.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In9.Cu]
|
||||
Name=In9.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In10.Cu]
|
||||
Name=In10.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In11.Cu]
|
||||
Name=In11.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In12.Cu]
|
||||
Name=In12.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In13.Cu]
|
||||
Name=In13.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In14.Cu]
|
||||
Name=In14.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In15.Cu]
|
||||
Name=In15.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In16.Cu]
|
||||
Name=In16.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In17.Cu]
|
||||
Name=In17.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In18.Cu]
|
||||
Name=In18.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In19.Cu]
|
||||
Name=In19.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In20.Cu]
|
||||
Name=In20.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In21.Cu]
|
||||
Name=In21.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In22.Cu]
|
||||
Name=In22.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In23.Cu]
|
||||
Name=In23.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In24.Cu]
|
||||
Name=In24.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In25.Cu]
|
||||
Name=In25.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In26.Cu]
|
||||
Name=In26.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In27.Cu]
|
||||
Name=In27.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In28.Cu]
|
||||
Name=In28.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In29.Cu]
|
||||
Name=In29.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.In30.Cu]
|
||||
Name=In30.Cu
|
||||
Type=0
|
||||
Enabled=0
|
||||
[pcbnew/Layer.B.Cu]
|
||||
Name=B.Cu
|
||||
Type=0
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Adhes]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Paste]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.SilkS]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Mask]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Dwgs.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Cmts.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco1.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Eco2.User]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Edge.Cuts]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Margin]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.CrtYd]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.B.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.F.Fab]
|
||||
Enabled=1
|
||||
[pcbnew/Layer.Rescue]
|
||||
Enabled=0
|
||||
[pcbnew/Netclasses]
|
||||
[pcbnew/Netclasses/Default]
|
||||
Name=Default
|
||||
Clearance=0.1
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
[pcbnew/Netclasses/1]
|
||||
Name=small
|
||||
Clearance=0.1
|
||||
TrackWidth=0.25
|
||||
ViaDiameter=0.8
|
||||
ViaDrill=0.4
|
||||
uViaDiameter=0.3
|
||||
uViaDrill=0.1
|
||||
dPairWidth=0.2
|
||||
dPairGap=0.25
|
||||
dPairViaGap=0.25
|
||||
Loading…
Reference in New Issue