Morgan 'ARR\!' Allen
|
b7e38d4fe1
|
added header, added SOICBite, updated to kicad 6, fixed some silks
|
2022-03-15 18:43:16 -07:00 |
|
Morgan 'ARR\!' Allen
|
ebbecbfb41
|
add pull-down resistors to lora modules
|
2021-12-07 22:21:49 -08:00 |
|
Morgan 'ARR\!' Allen
|
8f01c963ec
|
broke out last available gpios
|
2021-11-17 22:13:05 -08:00 |
|
Morgan 'ARR\!' Allen
|
a5e4b1f188
|
rev1
|
2021-07-12 17:16:08 -07:00 |
|
Morgan 'ARR\!' Allen
|
f16f0743af
|
tweak pours to remove VCC from under all antenna pathways
|
2021-06-16 10:09:24 -07:00 |
|
Morgan 'ARR\!' Allen
|
1889c86c95
|
add 3d model for DORJI module
|
2021-06-16 10:08:59 -07:00 |
|
Morgan 'ARR\!' Allen
|
a5071fdc21
|
added third mounting hole. might be too close to module though
|
2021-06-15 17:45:46 -07:00 |
|
Morgan 'ARR\!' Allen
|
661e1bae05
|
double checked pins, moved SPI to default pins
|
2021-06-15 17:43:11 -07:00 |
|
Morgan 'ARR\!' Allen
|
0858876954
|
track symbol file
|
2021-06-15 16:42:36 -07:00 |
|
Morgan 'ARR\!' Allen
|
53727820aa
|
simplified parts of design, switched to AP2112K-3.3 for power reg
|
2021-06-15 16:33:19 -07:00 |
|
Morgan 'ARR\!' Allen
|
a83fe17a11
|
first pass
|
2021-06-15 15:47:07 -07:00 |